Svelto, Francesco

Full Professor

He received the Laurea and Ph.D. degrees in electrical engineering from Università di Pavia, Italy, in 1991 and 1995, respectively. During 1995-1997 he held an industry grant for research in RF CMOS. In 1997 he was appointed Assistant Professor at Università di Bergamo, and in 2000, he joined Università di Pavia, where he is now Full Professor. His current interests are in the field of RF and high speed integrated circuits.

Dr. Svelto has been technical advisor of RFDomus Inc., a start-up he co-founded in 2002 dedicated to highly integrated GPS receivers. After merging with Glonav Inc. (Ireland), RFDomus has been acquired by NXP Semiconductors in 2007.

Presently he is the Director of the Studio di Microelettronica, a joint scientific laboratory between Università di Pavia and STMicrolectronics, dedicated to research in Microelectronics, with emphasis to mm-wave systems for wireless communications, high-speed serial links and read-write channels for hard disk-drives.

Dr. Svelto is member of the technical program committee of the International Solid State Circuits Conference and has been a member of Custom Integrated Circuits Conference, Bipolar/ BiCMOS Circuits Technology Meeting and European Solid State Circuits Conference. He served as Associate Editor of IEEE Journal of Solid State Circuits (2003-2007), and as Guest Editor for a special issue on the same journal in March 2003.

He is co-recipient of the IEEE Journal of Solid State Circuits 2003 Best Paper Award, and he has been elevated IEEE Fellow in 2013.


CONTACT

E-mail: francesco.svelto@unipv.it
Office: +39 0382 985217


PUBLICATIONS

2015

  • [DOI] F. Svelto, A. Ghilioni, E. Monaco, E. Mammei, and A. Mazzanti, “The Impact of CMOS Scaling on the Design of Circuits for mm-Wave Frequency Synthesizers,” in High-Performance AD and DA Converters, IC Design in Scaled Technologies, and Time-Domain Signal Processing, P. Harpe, A. Baschirotto, and K. A. A. Makinwa, Eds., Springer International Publishing, 2015, pp. 233-252.
    [Bibtex]
    @INCOLLECTION{2015Svelto,
      author = {Svelto, Francesco and Ghilioni, Andrea and Monaco, Enrico and Mammei,
      Enrico and Mazzanti, Andrea},
      title = {The Impact of CMOS Scaling on the Design of Circuits for mm-Wave
      Frequency Synthesizers},
      booktitle = {High-Performance AD and DA Converters, IC Design in Scaled Technologies,
      and Time-Domain Signal Processing},
      publisher = {Springer International Publishing},
      year = {2015},
      editor = {Harpe, Pieter and Baschirotto, Andrea and Makinwa, Kofi A. A.},
      pages = {233-252},
      doi = {10.1007/978-3-319-07938-7_10},
      isbn = {978-3-319-07937-0},
      language = {English},
      timestamp = {2015.03.04},
      url = {http://dx.doi.org/10.1007/978-3-319-07938-7_10}
    }

2014

  • [DOI] D. Bianchi, F. Quaglia, A. Mazzanti, and F. Svelto, “Analysis and Design of a High Voltage Integrated Class-B Amplifier for Ultra-Sound Transducers,” Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 61, iss. 7, pp. 1942-1951, 2014.
    [Bibtex]
    @ARTICLE{2014Bianchi,
      author = {Bianchi, D. and Quaglia, F. and Mazzanti, A. and Svelto, F.},
      title = {Analysis and Design of a High Voltage Integrated Class-B Amplifier
      for Ultra-Sound Transducers},
      journal = {Circuits and Systems I: Regular Papers, IEEE Transactions on},
      year = {2014},
      volume = {61},
      pages = {1942-1951},
      number = {7},
      month = {July},
      doi = {10.1109/TCSI.2014.2298284},
      issn = {1549-8328},
      keywords = {amplifiers;frequency response;integrated circuit design;linear network
      analysis;ultrasonic transducers;BCD technology;BCD6-SOI technology;apodization
      profiles;capacitance 150 pF;circuit analysis;device parameters;discrete
      technology approach;feedback loop;harmonic content;high voltage integrated
      class-B amplifier;high voltage trans-impedance stage;large signal
      frequency response;linear amplifiers;low-voltage transconductor;manufacturing
      costs;power 37 mW;resistance 100 ohm;signal amplitude;space occupation;transmit
      energy;ultra-sound applications;ultra-sound transducers;Bandwidth;Capacitance;Capacitors;Frequency
      response;Gain;Harmonic analysis;Impedance;BCD technology;class-B;descriptive
      function;high-voltage ICs;linear amplifier;ultrasound},
      timestamp = {2015.03.04}
    }
  • [DOI] D. Li, G. Minoia, M. Repossi, D. Baldi, E. Temporiti, A. Mazzanti, and F. Svelto, “A Low-Noise Design Technique for High-Speed CMOS Optical Receivers,” Solid-State Circuits, IEEE Journal of, vol. 49, iss. 6, pp. 1437-1447, 2014.
    [Bibtex]
    @ARTICLE{2014Li,
      author = {Dan Li and Minoia, G. and Repossi, M. and Baldi, D. and Temporiti,
      E. and Mazzanti, A. and Svelto, F.},
      title = {A Low-Noise Design Technique for High-Speed CMOS Optical Receivers},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2014},
      volume = {49},
      pages = {1437-1447},
      number = {6},
      month = {June},
      doi = {10.1109/JSSC.2014.2322868},
      issn = {0018-9200},
      keywords = {CMOS analogue integrated circuits;CMOS integrated circuits;integrated
      optoelectronics;operational amplifiers;optical receivers;photodiodes;100GBASE-LR4
      standard;BiCMOS realizations;PRBS31 input pattern;TSFE;bit rate 25
      Gbit/s;capacitance 160 pF;colored noise reduction;core first-stage
      amplifier;equalizer;high-speed CMOS optical receivers;limiting amplifier;low-noise
      design technique;low-noise narrowband transimpedance interface;low-noise
      wideband TIAs;net 4 × noise power reduction;optical communications;photodiode;power
      consumption;size 65 nm;traditional shunt-feedback TIA;transimpedance
      amplifiers;two-stage front-end;white noise components;wideband output
      buffer;Bandwidth;CMOS integrated circuits;Capacitance;Equalizers;Gain;Noise;Optical
      receivers;CMOS technology;current reuse;equalization;input-referred
      noise;optical receivers;shunt-feedback;transimpedance amplifiers
      (TIA)},
      timestamp = {2015.03.04}
    }
  • [DOI] E. Temporiti, G. Minoia, M. Repossi, D. Baldi, A. Ghilioni, and F. Svelto, “A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm CMOS technologies,” in European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 – 40th, 2014, pp. 131-134.
    [Bibtex]
    @INPROCEEDINGS{2014Temporiti,
      author = {Temporiti, E. and Minoia, G. and Repossi, M. and Baldi, D. and Ghilioni,
      A. and Svelto, F.},
      title = {A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm
      CMOS technologies},
      booktitle = {European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014
      - 40th},
      year = {2014},
      pages = {131-134},
      month = {Sept},
      doi = {10.1109/ESSCIRC.2014.6942039},
      issn = {1930-8833},
      keywords = {CMOS integrated circuits;copper;elemental semiconductors;integrated
      optics;integrated optoelectronics;optical interconnections;optical
      waveguides;photodiodes;silicon;3D-compatible silicon photonics platform;3D-integrated
      silicon photonics receiver;BER;CMOS amplification chain;CMOS technologies;Cu;Ge;PIC25G;STMicroelectronics;Si;bit
      rate 25 Gbit/s;copper pillars;germanium photodiode;integrated photonics;integrated
      waveguide;optical devices;optical interconnects;optical power sensitivity;optoelectronic
      receiver;photonics integrated circuits;size 65 nm;wavelength 1310
      nm;CMOS integrated circuits;Copper;Optical receivers;Optical sensors;Sensitivity;Silicon
      photonics;3D integration;PIC;Silicon photonics;copper pillars;optical
      receiver;sensitivity},
      timestamp = {2015.03.04}
    }
  • [DOI] J. Zhao, M. Bassi, A. Bevilacqua, A. Ghilioni, A. Mazzanti, and F. Svelto, “A 40-67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS LP,” in European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 – 40th, 2014, pp. 179-182.
    [Bibtex]
    @INPROCEEDINGS{2014Zhao,
      author = {Junlei Zhao and Bassi, M. and Bevilacqua, A. and Ghilioni, A. and
      Mazzanti, A. and Svelto, F.},
      title = {A 40-67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS
      LP},
      booktitle = {European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014
      - 40th},
      year = {2014},
      pages = {179-182},
      month = {Sept},
      doi = {10.1109/ESSCIRC.2014.6942051},
      issn = {1930-8833},
      keywords = {CMOS analogue integrated circuits;differential amplifiers;field effect
      MIMIC;impedance matching;low-power electronics;millimetre wave power
      amplifiers;millimetre wave resonators;wideband amplifiers;CMOS LP;Norton
      transformations;PAE;PSAT;efficiency 16 percent;frequency 40 GHz to
      67 GHz;impedance matching;low-power devices;mm-wave PAs;neutralized
      common source stages;output matching networks;size 28 nm;two-stage
      differential PA;wideband inductively coupled resonators;wideband
      power amplifiers;wireless applications;Bandwidth;CMOS integrated
      circuits;Gain;Impedance;Impedance matching;Inductors;Power generation},
      timestamp = {2015.03.04}
    }

2013

  • [DOI] D. Bianchi, F. Quaglia, A. Mazzanti, and F. Svelto, “High-voltage integrated Class-B amplifier for ultrasound transducers,” in IC Design Technology (ICICDT), 2013 International Conference on, 2013, pp. 105-108.
    [Bibtex]
    @INPROCEEDINGS{2013Bianchi,
      author = {Bianchi, D. and Quaglia, F. and Mazzanti, A. and Svelto, F.},
      title = {High-voltage integrated Class-B amplifier for ultrasound transducers},
      booktitle = {IC Design Technology (ICICDT), 2013 International Conference on},
      year = {2013},
      pages = {105-108},
      month = {May},
      doi = {10.1109/ICICDT.2013.6563314},
      keywords = {BIMOS integrated circuits;UHF integrated circuits;UHF power amplifiers;feedback
      amplifiers;power integrated circuits;ultrasonic imaging;ultrasonic
      transducers;BCD technology;BCD-6 SOI;Watts level;apodization profiles;circuit
      analysis;feedback amplifier;frequency 5.5 MHz;gain 40.9 dB;high-voltage
      high-efficiency class-B output stage;high-voltage integrated class-B
      amplifier;high-voltage linear amplifiers;large-signal frequency response;power
      37 mW;quiescent power dissipation;signal amplitude;ultrasound imaging;ultrasound
      transducers;voltage 90 V;Capacitance;Capacitors;Frequency response;Harmonic
      analysis;Imaging;Impedance;Ultrasonic imaging;BCD technology;class-B;descriptive
      function;high-voltage ICs;linear amplifier;ultrasound},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Ghilioni, A. Mazzanti, and F. Svelto, “Analysis and Design of mm-Wave Frequency Dividers Based on Dynamic Latches With Load Modulation,” Solid-State Circuits, IEEE Journal of, vol. 48, iss. 8, pp. 1842-1850, 2013.
    [Bibtex]
    @ARTICLE{2013Ghilioni,
      author = {Ghilioni, A. and Mazzanti, A. and Svelto, F.},
      title = {Analysis and Design of mm-Wave Frequency Dividers Based on Dynamic
      Latches With Load Modulation},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2013},
      volume = {48},
      pages = {1842-1850},
      number = {8},
      month = {Aug},
      doi = {10.1109/JSSC.2013.2258793},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;flip-flops;frequency dividers;inspection;low-power
      electronics;time-domain analysis;bulk CMOS;date injection locked
      topologies;dynamic latches;hold times;load modulation;maximum charge
      retention;maximum operation frequency;minimum operation frequency;mm-wave
      frequency dividers;power 4.8 mW;size 32 nm;static CML latches;time-domain
      circuit inspection;transceivers;wideband low-power frequency dividers;Clocks;Frequency
      conversion;Frequency modulation;Latches;Resistance;Switches;Time-frequency
      analysis;CMOS technology;frequency divider;integrated circuits modeling;low
      power electronics;millimeter wave analog integrated circuits;wideband},
      timestamp = {2015.03.04}
    }
  • [DOI] E. Mammei, E. Monaco, A. Mazzanti, and F. Svelto, “A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension,” in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International, 2013, pp. 350-351.
    [Bibtex]
    @INPROCEEDINGS{2013Mammei,
      author = {Mammei, E. and Monaco, E. and Mazzanti, A. and Svelto, F.},
      title = {A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM
      using inductor splitting for tuning extension},
      booktitle = {Solid-State Circuits Conference Digest of Technical Papers (ISSCC),
      2013 IEEE International},
      year = {2013},
      pages = {350-351},
      month = {Feb},
      doi = {10.1109/ISSCC.2013.6487765},
      issn = {0193-6530},
      keywords = {CMOS integrated circuits;Q-factor;field effect MIMIC;inductors;millimetre
      wave oscillators;phase noise;voltage-controlled oscillators;CMOS
      VCO;MOM capacitors;RF thick metal;capacitor switched bank;equivalent
      tank inductance;frequency 33.6 GHz to 46.2 GHz;frequency 57 GHz to
      66 GHz;inductor splitting;low-noise on-chip oscillator;magnetic tuning
      methods;minimum noise FOM;parasitic capacitance;passive components;power
      9.8 mW;power dissipation;reduced quality factor;resonance frequencies;secondary
      coil impedance;signal integrity;signal processing;size 32 nm;size
      65 nm;stringent reference phase noise;switched-capacitor tank;transformer;transistor;tuning
      extension;ultrascaled CMOS technology node;ultrascaled standard digital
      CMOS technology;ultrawide tuning range;wireless transceivers;CMOS
      integrated circuits;Capacitors;Inductors;Phase noise;Switches;Tuning;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }

2012

  • [DOI] D. Bianchi, F. Quaglia, A. Mazzanti, and F. Svelto, “A 90Vpp 720MHz GBW linear power amplifier for ultrasound imaging transmitters in BCD6-SOI,” in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International, 2012, pp. 370-372.
    [Bibtex]
    @INPROCEEDINGS{2012Bianchi,
      author = {Bianchi, D. and Quaglia, F. and Mazzanti, A. and Svelto, F.},
      title = {A 90Vpp 720MHz GBW linear power amplifier for ultrasound imaging
      transmitters in BCD6-SOI},
      booktitle = {Solid-State Circuits Conference Digest of Technical Papers (ISSCC),
      2012 IEEE International},
      year = {2012},
      pages = {370-372},
      month = {Feb},
      doi = {10.1109/ISSCC.2012.6177054},
      issn = {0193-6530},
      keywords = {power amplifiers;ultrasonic imaging;BCD6-SOI;EM interference reduction;GBW
      linear power amplifier;apodization profiles;frequency 720 MHz;harmonic
      imaging;integrated amplifier topologies;pulse transmission technique;reliability
      improvement;transducer drivers;ultrasound imaging transmitters;waveform
      generators;Harmonic analysis;Harmonic distortion;Imaging;Impedance;Power
      amplifiers;Ultrasonic imaging;Voltage measurement},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Ghilioni, U. Decanis, A. Mazzanti, and F. Svelto, “A 4.8mW inductorless CMOS frequency divider-by-4 with more than 60% fractional bandwidth up to 70GHz,” in Custom Integrated Circuits Conference (CICC), 2012 IEEE, 2012, pp. 1-4.
    [Bibtex]
    @INPROCEEDINGS{2012Ghilioni,
      author = {Ghilioni, A. and Decanis, U. and Mazzanti, A. and Svelto, F.},
      title = {A 4.8mW inductorless CMOS frequency divider-by-4 with more than 60%
      fractional bandwidth up to 70GHz},
      booktitle = {Custom Integrated Circuits Conference (CICC), 2012 IEEE},
      year = {2012},
      pages = {1-4},
      month = {Sept},
      doi = {10.1109/CICC.2012.6330595},
      issn = {0886-5930},
      keywords = {CMOS integrated circuits;differential amplifiers;frequency dividers;frequency
      synthesizers;bandwidth 14 GHz to 70 GHz;clocked differential amplifiers;dynamic
      CML latches;fractional bandwidth;frequency synthesizers;inductorless
      CMOS frequency divider-by-4;large division factors;load resistance;power
      4.8 mW;size 32 nm;tail current;wide-band low-power dividers;Bandwidth;CMOS
      integrated circuits;Clocks;Frequency conversion;Latches;Power demand;Resistance;Frequency
      divider and CMOS technology;Low power electronics;Millimeter wave
      circuits;Wideband},
      timestamp = {2015.03.04}
    }
  • [DOI] D. Li, G. Minoia, M. Repossi, D. Baldi, E. Temporiti, A. Mazzanti, and F. Svelto, “A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4,” in ESSCIRC (ESSCIRC), 2012 Proceedings of the, 2012, pp. 221-224.
    [Bibtex]
    @INPROCEEDINGS{2012Li,
      author = {Dan Li and Minoia, G. and Repossi, M. and Baldi, D. and Temporiti,
      E. and Mazzanti, A. and Svelto, F.},
      title = {A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4},
      booktitle = {ESSCIRC (ESSCIRC), 2012 Proceedings of the},
      year = {2012},
      pages = {221-224},
      month = {Sept},
      doi = {10.1109/ESSCIRC.2012.6341298},
      issn = {1930-8833},
      keywords = {CMOS integrated circuits;buffer circuits;equalisers;integrated circuit
      noise;mean square error methods;operational amplifiers;optical receivers;power
      consumption;bandwidth 10 GHz to 18.2 GHz;bit rate 25 Gbit/s;buffer;current
      2.44 muA;electrical analog bandwidth;equalizer;equivalent rms noise
      current;limiting amplifier;low noise CMOS receiver;low noise narrow-band
      TIA;noise power reduction;power 93 mW;power consumption;shunt-feedback;size
      65 nm;trade-off;two stage front-end;Bandwidth;CMOS integrated circuits;Equalizers;Noise;Optical
      fiber amplifiers;Radio frequency;Receivers},
      timestamp = {2015.03.04}
    }

2011

  • [DOI] U. Decanis, A. Ghilioni, E. Monaco, A. Mazzanti, and F. Svelto, “A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators and a Wideband Frequency Divider at Millimeter Waves,” Solid-State Circuits, IEEE Journal of, vol. 46, iss. 12, pp. 2943-2955, 2011.
    [Bibtex]
    @ARTICLE{2011Decanis,
      author = {Decanis, U. and Ghilioni, A. and Monaco, E. and Mazzanti, A. and
      Svelto, F.},
      title = {A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators
      and a Wideband Frequency Divider at Millimeter Waves},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2011},
      volume = {46},
      pages = {2943-2955},
      number = {12},
      month = {Dec},
      doi = {10.1109/JSSC.2011.2162468},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;differential amplifiers;field effect MIMIC;frequency
      dividers;millimetre wave frequency convertors;millimetre wave oscillators;phase
      noise;voltage-controlled oscillators;CMOS process;MIMIC;clocked differential
      amplifiers;current 22 mA;frequency 56 GHz to 60.4 GHz;inter-stage
      passive components;low-noise quadrature VCO;magnetically coupled
      resonators;phase error;phase noise;phased-array systems;power 6.5
      mW;size 65 nm;voltage 1 V;wideband frequency divider;wireless on-chip
      processing;Couplings;Frequency conversion;Phase noise;Resonant frequency;Voltage-controlled
      oscillators;CMOS;direct conversion;frequency divider;low phase noise;low-$k$
      transformer;millimeter wave;quadrature voltage-controlled oscillator
      (VCO)},
      timestamp = {2015.03.04}
    }
  • [DOI] U. Decanis, A. Ghilioni, E. Monaco, A. Mazzanti, and F. Svelto, “A mm-Wave quadrature VCO based on magnetically coupled resonators,” in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International, 2011, pp. 280-282.
    [Bibtex]
    @INPROCEEDINGS{2011Decanisa,
      author = {Decanis, U. and Ghilioni, A. and Monaco, E. and Mazzanti, A. and
      Svelto, F.},
      title = {A mm-Wave quadrature VCO based on magnetically coupled resonators},
      booktitle = {Solid-State Circuits Conference Digest of Technical Papers (ISSCC),
      2011 IEEE International},
      year = {2011},
      pages = {280-282},
      month = {Feb},
      doi = {10.1109/ISSCC.2011.5746318},
      issn = {0193-6530},
      keywords = {1/f noise;CMOS integrated circuits;resonators;voltage-controlled oscillators;1/f
      noise;CMOS technology;compact quadrature generator;cross-coupled
      LC voltage-controlled oscillator;current 22 mA;dividers;double-frequency
      VCO;frequency 1 MHz;frequency 56 GHz to 60.3 GHz;magnetically coupled
      resonator;mm-wave quadrature VCO;size 65 nm;voltage 1 V;CMOS integrated
      circuits;Phase noise;Resonant frequency;Solid state circuits;Tuning;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Ghilioni, U. Decanis, E. Monaco, A. Mazzanti, and F. Svelto, “A 6.5mW inductorless CMOS frequency divider-by-4 operating up to 70GHz,” in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International, 2011, pp. 282-284.
    [Bibtex]
    @INPROCEEDINGS{2011Ghilioni,
      author = {Ghilioni, A. and Decanis, U. and Monaco, E. and Mazzanti, A. and
      Svelto, F.},
      title = {A 6.5mW inductorless CMOS frequency divider-by-4 operating up to
      70GHz},
      booktitle = {Solid-State Circuits Conference Digest of Technical Papers (ISSCC),
      2011 IEEE International},
      year = {2011},
      pages = {282-284},
      month = {Feb},
      doi = {10.1109/ISSCC.2011.5746319},
      issn = {0193-6530},
      keywords = {CMOS integrated circuits;current-mode logic;differential amplifiers;field
      effect MIMIC;flip-flops;frequency dividers;injection locked oscillators;integrated
      circuit interconnections;optical communication;radio transceivers;synchronisation;clock
      synchronization;clocked differential amplifiers;digital calibration;inductorless
      CMOS frequency divider;injection locking;injection-locked oscillators;integrated
      circuit interconnections;mm-wave dividers;nanometer-scale CMOS technology;optical
      communications;power 6.5 mW;radio frequency application;size 65 nm;static
      CML latches;wireless transceivers;CMOS integrated circuits;Capacitors;Clocks;Frequency
      conversion;Latches;Noise measurement;Time frequency analysis},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, M. Sosio, M. Repossi, and F. Svelto, “A 24 GHz Subharmonic Direct Conversion Receiver in 65 nm CMOS,” Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 58, iss. 1, pp. 88-97, 2011.
    [Bibtex]
    @ARTICLE{2011Mazzanti,
      author = {Mazzanti, A. and Sosio, M. and Repossi, M. and Svelto, F.},
      title = {A 24 GHz Subharmonic Direct Conversion Receiver in 65 nm CMOS},
      journal = {Circuits and Systems I: Regular Papers, IEEE Transactions on},
      year = {2011},
      volume = {58},
      pages = {88-97},
      number = {1},
      month = {Jan},
      doi = {10.1109/TCSI.2010.2071711},
      issn = {1549-8328},
      keywords = {CMOS integrated circuits;low-power electronics;microwave switches;millimetre
      wave oscillators;millimetre wave receivers;transceivers;forward signal
      paths;frequency 24 GHz;gain;gain 30.5 dB;gain 6.7 dB;half frequency
      operation;integrated LNA matching network;local oscillator;microwaves;millimeter
      waves;optimum biasing;phased array systems;power 78 mW;power consumption;return
      signal paths;scaled CMOS;sensitivity;single-ended topology;stacked
      switches;subharmonic direct conversion receiver;subharmonic down-conversion;transceiver
      IC;transceivers;transresistance amplifier;CMOS integrated circuits;Capacitors;Impedance
      matching;Inductors;Mixers;Noise;Receivers;CMOS;LNA;integrated circuits;millimeter
      waves;receivers;subharmonic mixers},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Vecchi, S. Bozzola, E. Temporiti, D. Guermandi, M. Pozzoni, M. Repossi, M. Cusmai, U. Decanis, A. Mazzanti, and F. Svelto, “A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS,” Solid-State Circuits, IEEE Journal of, vol. 46, iss. 3, pp. 551-561, 2011.
    [Bibtex]
    @ARTICLE{2011Vecchi,
      author = {Vecchi, F. and Bozzola, S. and Temporiti, E. and Guermandi, D. and
      Pozzoni, M. and Repossi, M. and Cusmai, M. and Decanis, U. and Mazzanti,
      A. and Svelto, F.},
      title = {A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2011},
      volume = {46},
      pages = {551-561},
      number = {3},
      month = {March},
      doi = {10.1109/JSSC.2010.2100251},
      issn = {0018-9200},
      keywords = {CMOS analogue integrated circuits;MMIC amplifiers;MMIC oscillators;low-power
      electronics;microwave filters;phase detectors;radio links;radio transceivers;voltage-controlled
      oscillators;wideband amplifiers;analog fractional bandwidths;charge
      pump combination;classical LC loaded stages bandwidth;filter components
      integrated phase noise;frequency reference generator;high-rate communications
      technology;in-band gain ripple;integer-N type-II synthesizer;interstage
      coupling;linear processing chain;low power wide range divider chain;noise
      figure 6.5 dB;power 84 mW;signal constellation integrity;size 65
      nm;sliding IF architecture;state phase frequency detector;switched
      tuned LC VCO;transceiver;wideband amplifiers;wideband receiver;wireless
      links;Bandwidth;Capacitors;Couplings;Gain;Mixers;Noise;Synthesizers;CMOS;coupled
      resonators;dividers;integrated noise;low noise amplifiers;millimeter
      wave receiver;mixer;mm-wave;synthesizer;wideband},
      timestamp = {2015.03.04}
    }

2010

  • [DOI] A. Mazzanti, E. Monaco, M. Pozzoni, and F. Svelto, “A 13.1% tuning range 115GHz frequency generator based on an injection-locked frequency doubler in 65nm CMOS,” in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, 2010, pp. 422-423.
    [Bibtex]
    @INPROCEEDINGS{2010Mazzanti,
      author = {Mazzanti, A. and Monaco, E. and Pozzoni, M. and Svelto, F.},
      title = {A 13.1% tuning range 115GHz frequency generator based on an injection-locked
      frequency doubler in 65nm CMOS},
      booktitle = {Solid-State Circuits Conference Digest of Technical Papers (ISSCC),
      2010 IEEE International},
      year = {2010},
      pages = {422-423},
      month = {Feb},
      doi = {10.1109/ISSCC.2010.5433869},
      issn = {0193-6530},
      keywords = {CMOS analogue integrated circuits;field effect MIMIC;frequency multipliers;injection
      locked oscillators;low-power electronics;millimetre wave oscillators;phase
      noise;voltage-controlled oscillators;CMOS frequency multiplier;frequency
      115 GHz;frequency generator;half-frequency VCO;injection-locked Pierce
      oscillator;injection-locked frequency doubler;phase noise;power 12
      mW;power dissipation;size 65 nm;stand-alone push-push multipliers;CMOS
      technology;Capacitors;Circuits;Frequency;Injection-locked oscillators;Phase
      noise;Semiconductor device measurement;Tuning;Voltage;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, M. B. Vahidfar, M. Sosio, and F. Svelto, “A Low Phase-Noise Multi-Phase LO Generator for Wideband Demodulators Based on Reconfigurable Sub-Harmonic Mixers,” Solid-State Circuits, IEEE Journal of, vol. 45, iss. 10, pp. 2104-2115, 2010.
    [Bibtex]
    @ARTICLE{2010Mazzantia,
      author = {Mazzanti, A. and Vahidfar, M.B. and Sosio, M. and Svelto, F.},
      title = {A Low Phase-Noise Multi-Phase LO Generator for Wideband Demodulators
      Based on Reconfigurable Sub-Harmonic Mixers},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2010},
      volume = {45},
      pages = {2104-2115},
      number = {10},
      month = {Oct},
      doi = {10.1109/JSSC.2010.2060258},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;cellular radio;demodulators;frequency synthesizers;mixers
      (circuits);network topology;oscillators;ultra wideband communication;wireless
      LAN;UWB technology;WiMedia UWB groups;circuit topologies;cognitive
      radios;frequency 10 MHz;frequency 3.1 GHz to 9.5 GHz;frequency synthesizer;harmonic
      operation modes;low phase-noise multiphase LO generator;multistage
      injection locked ring oscillator;reconfigurable subharmonic mixers;software
      defined radios;transceiver architectures;wideband CMOS receivers;wideband
      demodulators;Demodulation;Mixers;Phase locked loops;Phase noise;Ring
      oscillators;Tuning;Wideband;Fast hopping synthesizer;UWB;injection
      locking;multi phase local oscillator;phase noise;ring oscillator;sub-harmonic
      mixers;ultra wide band},
      timestamp = {2015.03.04}
    }
  • [DOI] E. Monaco, M. Pozzoni, F. Svelto, and A. Mazzanti, “Injection-Locked CMOS Frequency Doublers for \mu -Wave and mm-Wave Applications,” Solid-State Circuits, IEEE Journal of, vol. 45, iss. 8, pp. 1565-1574, 2010.
    [Bibtex]
    @ARTICLE{2010Monaco,
      author = {Monaco, E. and Pozzoni, M. and Svelto, F. and Mazzanti, A.},
      title = {Injection-Locked CMOS Frequency Doublers for \mu -Wave and mm-Wave
      Applications},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2010},
      volume = {45},
      pages = {1565-1574},
      number = {8},
      month = {Aug},
      doi = {10.1109/JSSC.2010.2049780},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;frequency multipliers;millimetre wave integrated
      circuits;millimetre wave oscillators;voltage-controlled oscillators;μ-wave
      applications;F-band multiplier;Ku-band multiplier;autonomous differential
      oscillator;bandwidth 106 GHz to 128 GHz;bandwidth 11 GHz to 15 GHz;double
      frequency tone locking;frequency tuning range;half-frequency standard
      LC-tank VCO;injection-locked CMOS frequency doublers;key passive
      components;mm-wave applications;on-chip frequency generators;power
      5.2 mW;power 6 mW;signal spectral purity;size 0.13 mum;size 65 nm;variable
      capacitors;voltage 330 mV;voltage 470 mV;voltage-controlled oscillators
      running;Bandwidth;CMOS technology;Capacitors;Degradation;Displays;Frequency;Signal
      design;Tuning;Voltage;Voltage-controlled oscillators;Frequency doubler;frequency
      multiplier;injection locking;microwaves;millimeter waves;mmw;push-push},
      timestamp = {2015.03.04}
    }
  • [DOI] E. Monaco, M. Pozzoni, F. Svelto, and A. Mazzanti, “A 6mW, 115GHz CMOS injection-locked frequency doubler with differential output,” in IC Design and Technology (ICICDT), 2010 IEEE International Conference on, 2010, pp. 236-239.
    [Bibtex]
    @INPROCEEDINGS{2010Monacoa,
      author = {Monaco, E. and Pozzoni, M. and Svelto, F. and Mazzanti, A.},
      title = {A 6mW, 115GHz CMOS injection-locked frequency doubler with differential
      output},
      booktitle = {IC Design and Technology (ICICDT), 2010 IEEE International Conference
      on},
      year = {2010},
      pages = {236-239},
      month = {June},
      doi = {10.1109/ICICDT.2010.5510246},
      keywords = {CMOS integrated circuits;MIMIC;frequency multipliers;oscillators;CMOS
      injection-locked frequency doubler;Pierce oscillator;active devices;closed
      form expression;differential output;frequency 115 GHz;frequency locking
      range;frequency multipliers;millimeter-wave CMOS frequency multiplier;power
      6 mW;push-push pair;Bandwidth;CMOS technology;Frequency;Injection-locked
      oscillators;Millimeter wave circuits;Millimeter wave technology;Power
      dissipation;Power system harmonics;Prototypes;Semiconductor device
      modeling},
      timestamp = {2015.03.04}
    }
  • [DOI] M. Pozzoni, S. Erba, D. Sanzogni, M. Ganzerli, P. Viola, D. Baldi, M. Repossi, G. Spelgatti, and F. Svelto, “A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization,” in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, 2010, pp. 164-165.
    [Bibtex]
    @INPROCEEDINGS{2010Pozzoni,
      author = {Pozzoni, M. and Erba, S. and Sanzogni, D. and Ganzerli, M. and Viola,
      P. and Baldi, D. and Repossi, M. and Spelgatti, G. and Svelto, F.},
      title = {A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional
      equalization},
      booktitle = {Solid-State Circuits Conference Digest of Technical Papers (ISSCC),
      2010 IEEE International},
      year = {2010},
      pages = {164-165},
      month = {Feb},
      doi = {10.1109/ISSCC.2010.5434006},
      issn = {0193-6530},
      keywords = {decision feedback equalisers;feedback;receivers;CMOS receiver;bi-dimensional
      equalization;decision feedback equalization;feedback delay;loss-recovery
      unclocked-DFE receiver;Backplanes;Clocks;Decision feedback equalizers;Delay;Event
      detection;Filters;Jitter;Logic;Principal component analysis;Timing},
      timestamp = {2015.03.04}
    }
  • [DOI] E. Temporiti, C. Weltin-Wu, D. Baldi, M. Cusmai, and F. Svelto, “A 3.5 GHz Wideband ADPLL With Fractional Spur Suppression Through TDC Dithering and Feedforward Compensation,” Solid-State Circuits, IEEE Journal of, vol. 45, iss. 12, pp. 2723-2736, 2010.
    [Bibtex]
    @ARTICLE{2010Temporiti,
      author = {Temporiti, E. and Weltin-Wu, C. and Baldi, D. and Cusmai, M. and
      Svelto, F.},
      title = {A 3.5 GHz Wideband ADPLL With Fractional Spur Suppression Through
      TDC Dithering and Feedforward Compensation},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2010},
      volume = {45},
      pages = {2723-2736},
      number = {12},
      month = {Dec},
      doi = {10.1109/JSSC.2010.2077370},
      issn = {0018-9200},
      keywords = {CMOS digital integrated circuits;analogue-digital conversion;calibration;compensation;digital
      phase locked loops;feedforward;field effect MMIC;interference suppression;phase
      noise;TDC dithering;all-digital phase-locked-loop;calibration;digital
      CMOS prototype;dither-induced phase noise suppression;divider-less
      fractional-N ADPLL;feedforward compensation;feedforward dither cancellation
      technique;fractional spur suppression;fractional tone;frequency 3.5
      GHz;size 65 nm;time-to-digital converter;wideband ADPLL;Calibration;Delay;Frequency
      synthesizers;Phase locked loops;Phase noise;Table lookup;ADPLL;Fractional-
      $N$;dither;frequency synthesizer;phase-locked-loop (PLL);spurious
      tones;time-to-digital converter (TDC)},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Vecchi, S. Bozzola, M. Pozzoni, D. Guermandi, E. Temporiti, M. Repossi, U. Decanis, A. Mazzanti, and F. Svelto, “A 60GHz receiver with 13GHz bandwidth for Gbit/s wireless links in 65nm CMOS,” in IC Design and Technology (ICICDT), 2010 IEEE International Conference on, 2010, pp. 228-231.
    [Bibtex]
    @INPROCEEDINGS{2010Vecchi,
      author = {Vecchi, F. and Bozzola, S. and Pozzoni, M. and Guermandi, D. and
      Temporiti, E. and Repossi, M. and Decanis, U. and Mazzanti, A. and
      Svelto, F.},
      title = {A 60GHz receiver with 13GHz bandwidth for Gbit/s wireless links in
      65nm CMOS},
      booktitle = {IC Design and Technology (ICICDT), 2010 IEEE International Conference
      on},
      year = {2010},
      pages = {228-231},
      month = {June},
      doi = {10.1109/ICICDT.2010.5510248},
      keywords = {CMOS integrated circuits;low noise amplifiers;millimetre waves;mixers
      (circuits);phase noise;voltage-controlled oscillators;CMOS;LNA gain;RF
      mixer;VCO;bandwidth 13 GHz;frequency 10 MHz;frequency 60 GHz;gain
      35 dB;local oscillator;low-noise amplifier;mm-waves;phase noise;power
      75 mW;quadrature IF mixer;size 65 nm;sliding IF architecture;wireless
      link;Bandwidth;Frequency conversion;Gain;Local oscillators;Phase
      noise;Power dissipation;RF signals;Radio frequency;Voltage-controlled
      oscillators;Wideband},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Vecchi, S. Bozzola, M. Pozzoni, D. Guermandi, E. Temporiti, M. Repossi, U. Decanis, A. Mazzanti, and F. Svelto, “A wideband mm-Wave CMOS receiver for Gb/s communications employing interstage coupled resonators,” in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, 2010, pp. 220-221.
    [Bibtex]
    @INPROCEEDINGS{2010Vecchia,
      author = {Vecchi, F. and Bozzola, S. and Pozzoni, M. and Guermandi, D. and
      Temporiti, E. and Repossi, M. and Decanis, U. and Mazzanti, A. and
      Svelto, F.},
      title = {A wideband mm-Wave CMOS receiver for Gb/s communications employing
      interstage coupled resonators},
      booktitle = {Solid-State Circuits Conference Digest of Technical Papers (ISSCC),
      2010 IEEE International},
      year = {2010},
      pages = {220-221},
      month = {Feb},
      doi = {10.1109/ISSCC.2010.5433953},
      issn = {0193-6530},
      keywords = {low noise amplifiers;millimetre wave receivers;mixers (circuits);transceivers;voltage-controlled
      oscillators;LNA gain stages;RF mixer;VCO;dividers;interstage coupled
      resonators;power 75 mW;quadrature IF mixers;size 65 nm;wideband mm-wave
      CMOS receiver;Bandwidth;Capacitors;Inductors;Noise measurement;Phase
      noise;Radio frequency;Transconductors;Tuning;Voltage-controlled oscillators;Wideband},
      timestamp = {2015.03.04}
    }
  • [DOI] C. Weltin-Wu, E. Temporiti, D. Baldi, M. Cusmai, and F. Svelto, “A 3.5GHz wideband ADPLL with fractional spur suppression through TDC dithering and feedforward compensation,” in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, 2010, pp. 468-469.
    [Bibtex]
    @INPROCEEDINGS{2010Weltin-Wu,
      author = {Weltin-Wu, C. and Temporiti, E. and Baldi, D. and Cusmai, M. and
      Svelto, F.},
      title = {A 3.5GHz wideband ADPLL with fractional spur suppression through
      TDC dithering and feedforward compensation},
      booktitle = {Solid-State Circuits Conference Digest of Technical Papers (ISSCC),
      2010 IEEE International},
      year = {2010},
      pages = {468-469},
      month = {Feb},
      doi = {10.1109/ISSCC.2010.5433846},
      issn = {0193-6530},
      keywords = {CMOS integrated circuits;calibration;compensation;field effect MMIC;microwave
      circuits;phase locked loops;CMOS integrated circuit;TDC dithering;all
      digital phase locked loop;bandwidth 3.4 MHz;feedforward compensation;fractional
      spur suppression;fractional-N ADPLL;frequency 3.5 GHz;fully integrated
      calibration logic;in-band phase noise;power 8.7 mW;size 65 nm;wideband
      ADPLL;1f noise;Calibration;Counting circuits;Delay;Frequency;Noise
      cancellation;Phase noise;Semiconductor device measurement;Table lookup;Wideband},
      timestamp = {2015.03.04}
    }
  • [DOI] C. Weltin-Wu, E. Temporiti, M. Cusmai, D. Baldi, and F. Svelto, “Insights Into Wideband Fractional ADPLLs: Modeling and Calibration of Nonlinearity Induced Fractional Spurs,” Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 57, iss. 9, pp. 2259-2268, 2010.
    [Bibtex]
    @ARTICLE{2010Weltin-Wua,
      author = {Weltin-Wu, C. and Temporiti, E. and Cusmai, M. and Baldi, D. and
      Svelto, F.},
      title = {Insights Into Wideband Fractional ADPLLs: Modeling and Calibration
      of Nonlinearity Induced Fractional Spurs},
      journal = {Circuits and Systems I: Regular Papers, IEEE Transactions on},
      year = {2010},
      volume = {57},
      pages = {2259-2268},
      number = {9},
      month = {Sept},
      doi = {10.1109/TCSI.2010.2071650},
      issn = {1549-8328},
      keywords = {CMOS digital integrated circuits;calibration;digital phase locked
      loops;frequency synthesizers;phase noise;GSM;analog functions;analog
      signal;digital CMOS;digital calibration;fractional spur amplitude;fractional
      spur frequency;fractional-N all-digital phase-locked loops;frequency
      3 GHz;phase noise;prototype synthesizer;size 65 nm;voltage 1.2 V;voltage
      encoding;wideband fractional ADPLL;Bandwidth;Computational modeling;Delay;Phase
      locked loops;Phase noise;Radiation detectors;Synthesizers;All-digital
      phase-locked loop (ADPLL);TDC;digital calibration;fractional-N;frequency
      synthesizer;phase-locked loop (PLL);spurious tones},
      timestamp = {2015.03.04}
    }

2009

  • [DOI] S. Bozzola, D. Guermandi, F. Vecchi, M. Repossi, M. Pozzoni, A. Mazzanti, and F. Svelto, “A sliding IF receiver for mm-wave WLANs in 65nm CMOS,” in Custom Integrated Circuits Conference, 2009. CICC ’09. IEEE, 2009, pp. 669-672.
    [Bibtex]
    @INPROCEEDINGS{2009Bozzola,
      author = {Bozzola, S. and Guermandi, D. and Vecchi, F. and Repossi, M. and
      Pozzoni, M. and Mazzanti, A. and Svelto, F.},
      title = {A sliding IF receiver for mm-wave WLANs in 65nm CMOS},
      booktitle = {Custom Integrated Circuits Conference, 2009. CICC '09. IEEE},
      year = {2009},
      pages = {669-672},
      month = {Sept},
      doi = {10.1109/CICC.2009.5280754},
      keywords = {CMOS integrated circuits;receivers;CMOS;phase noise;power consumption;quadrature
      IF mixers;sliding IF receiver;Energy consumption;Gain measurement;Local
      oscillators;Noise measurement;Performance evaluation;Phase noise;Prototypes;Radio
      frequency;Tuning;Voltage-controlled oscillators;60 GHz receivers;mm-wave
      CMOS;sliding-IF architecture},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, M. B. Vahidfar, M. Sosio, and F. Svelto, “A reconfigurable demodulator with 3-to-5GHz agile synthesizer for 9-band WiMedia UWB in 65nm CMOS,” in Solid-State Circuits Conference – Digest of Technical Papers, 2009. ISSCC 2009. IEEE International, 2009, p. 412-413,413a.
    [Bibtex]
    @INPROCEEDINGS{2009Mazzantia,
      author = {Mazzanti, A. and Vahidfar, M.B. and Sosio, M. and Svelto, F.},
      title = {A reconfigurable demodulator with 3-to-5GHz agile synthesizer for
      9-band WiMedia UWB in 65nm CMOS},
      booktitle = {Solid-State Circuits Conference - Digest of Technical Papers, 2009.
      ISSCC 2009. IEEE International},
      year = {2009},
      pages = {412-413,413a},
      month = {Feb},
      doi = {10.1109/ISSCC.2009.4977483},
      keywords = {CMOS integrated circuits;MMIC;demodulators;frequency synthesizers;ultra
      wideband technology;CMOS reconfigurable direct-conversion receiver;WiMedia
      UWB synthesizer;frequency 3 GHz to 5 GHz;frequency synthesizer;power
      43 mW;reconfigurable demodulator;size 65 nm;Circuits;Demodulation;Noise
      measurement;Packaging;Physical layer;Power generation;Radio frequency;Synthesizers;Voltage;Wideband},
      timestamp = {2015.03.04}
    }
  • [DOI] E. Monaco, M. Borgarino, F. Svelto, and A. Mazzanti, “A 5.2mW ku-band CMOS injection-locked frequency doubler with differential input / output,” in Custom Integrated Circuits Conference, 2009. CICC ’09. IEEE, 2009, pp. 61-64.
    [Bibtex]
    @INPROCEEDINGS{2009Monaco,
      author = {Monaco, E. and Borgarino, M. and Svelto, F. and Mazzanti, A.},
      title = {A 5.2mW ku-band CMOS injection-locked frequency doubler with differential
      input / output},
      booktitle = {Custom Integrated Circuits Conference, 2009. CICC '09. IEEE},
      year = {2009},
      pages = {61-64},
      month = {Sept},
      doi = {10.1109/CICC.2009.5280886},
      keywords = {CMOS integrated circuits;MMIC frequency convertors;field effect MMIC;frequency
      multipliers;network topology;CMOS injection-locked frequency doubler;LC
      oscillator;MMIC frequency convertors;circuit topology;differential
      pair;frequency multipliers;locking range;power 5.2 mW;CMOS technology;Character
      generation;Circuit topology;Equations;Frequency;Oscillators;Power
      dissipation;Prototypes;Semiconductor device modeling;Signal generators},
      timestamp = {2015.03.04}
    }
  • [DOI] M. Pozzoni, S. Erba, P. Viola, M. Pisati, E. Depaoli, D. Sanzogni, R. Brama, D. Baldi, M. Repossi, and F. Svelto, “A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication,” Solid-State Circuits, IEEE Journal of, vol. 44, iss. 4, pp. 1306-1315, 2009.
    [Bibtex]
    @ARTICLE{2009Pozzoni,
      author = {Pozzoni, M. and Erba, S. and Viola, P. and Pisati, M. and Depaoli,
      E. and Sanzogni, D. and Brama, R. and Baldi, D. and Repossi, M. and
      Svelto, F.},
      title = {A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With
      a SSC Tolerant CDR for Serial Backplane Communication},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2009},
      volume = {44},
      pages = {1306-1315},
      number = {4},
      month = {April},
      doi = {10.1109/JSSC.2009.2014203},
      issn = {0018-9200},
      keywords = {decision feedback equalisers;receivers;SATA-SAS-FC receiver;SSC tolerant
      CDR;channel loss impairments;frequency-difference tracking;multi-standard
      latch-based 3-tap DFE receiver;receiver architecture;serial backplane
      communication;serial-to-parallel latency;Adaptive equalizers;Backplanes;Clocks;Decision
      feedback equalizers;Delay;Feedback loop;Frequency;Robustness;Synthetic
      aperture sonar;Topology;Adaptive equalizers;clock and data recovery;current-mode
      logic;data communication;decision feedback equalizers},
      timestamp = {2015.03.04}
    }
  • M. Sosio, A. Mazzanti, M. Repossi, and F. Svelto, “A low-power ka-band direct conversion receiver employing half-frequency local oscillator in 65nm CMOS,” in Microwave Conference, 2009. EuMC 2009. European, 2009, pp. 256-259.
    [Bibtex]
    @INPROCEEDINGS{2009Sosio,
      author = {Sosio, M. and Mazzanti, A. and Repossi, M. and Svelto, F.},
      title = {A low-power ka-band direct conversion receiver employing half-frequency
      local oscillator in 65nm CMOS},
      booktitle = {Microwave Conference, 2009. EuMC 2009. European},
      year = {2009},
      pages = {256-259},
      month = {Sept},
      keywords = {CMOS integrated circuits;millimetre wave mixers;millimetre wave receivers;oscillators;CMOS
      technology;Ka band direct conversion receiver;complementary metal-oxide-semiconductor;frequency
      tuning;gain 31.5 dB;half-frequency local oscillator;noise figure
      6.7 dB;power 78 mW;power dissipation;power silicon receivers;quadrature
      subharmonic mixers;size 65 nm;CMOS integrated circuits;CMOS technology;Frequency
      conversion;Frequency synthesizers;Integrated circuit noise;Local
      oscillators;Millimeter wave technology;Mixers;Silicon;Tuning},
      timestamp = {2015.03.04}
    }
  • [DOI] E. Temporiti, C. Weltin-Wu, D. Baldi, R. Tonietto, and F. Svelto, “Insights into wideband fractional All-Digital PLLs for RF applications,” in Custom Integrated Circuits Conference, 2009. CICC ’09. IEEE, 2009, pp. 37-44.
    [Bibtex]
    @INPROCEEDINGS{2009Temporiti,
      author = {Temporiti, E. and Weltin-Wu, C. and Baldi, D. and Tonietto, R. and
      Svelto, F.},
      title = {Insights into wideband fractional All-Digital PLLs for RF applications},
      booktitle = {Custom Integrated Circuits Conference, 2009. CICC '09. IEEE},
      year = {2009},
      pages = {37-44},
      month = {Sept},
      doi = {10.1109/CICC.2009.5280921},
      keywords = {CMOS digital integrated circuits;phase locked loops;radiofrequency
      integrated circuits;RF applications;analog PLL evolution;digital
      CMOS;digital calibration;dividerless all digital PLL;large scale
      integration;size 0.65 nm;spur reduction technique;technology scaling;wideband
      fractional all digital PLL;Calibration;Frequency synthesizers;Large
      scale integration;Phase locked loops;Predictive models;Radio frequency;Semiconductor
      device modeling;Wideband},
      timestamp = {2015.03.04}
    }
  • [DOI] E. Temporiti, C. Weltin-Wu, D. Baldi, R. Tonietto, and F. Svelto, “A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction Techniques,” Solid-State Circuits, IEEE Journal of, vol. 44, iss. 3, pp. 824-834, 2009.
    [Bibtex]
    @ARTICLE{2009Temporitia,
      author = {Temporiti, E. and Weltin-Wu, C. and Baldi, D. and Tonietto, R. and
      Svelto, F.},
      title = {A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing
      Spur Reduction Techniques},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2009},
      volume = {44},
      pages = {824-834},
      number = {3},
      month = {March},
      doi = {10.1109/JSSC.2008.2012363},
      issn = {0018-9200},
      keywords = {CMOS digital integrated circuits;digital integrated circuits;digital
      phase locked loops;CMOS IC;RF frequency synthesis;bandwidth 300 kHz
      to 1.8 MHz;fractional all-digital PLL;frequency 25 MHz;frequency
      3 GHz;in-band output spurs;power 10 mW;size 65 nm;spur reduction
      techniques implementation;time-to-digital converter;voltage 1.2 V;Bandwidth;CMOS
      process;CMOS technology;Frequency synthesizers;Linearity;Low voltage;Phase
      locked loops;Quantization;Radio frequency;Wideband;ADPLL;Vernier
      TDC;all-digital phase locked loop;digital calibration;fractional
      frequency synthesizer;mismatch correction;spur reduction;time-to-digital
      converter (TDC)},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Vecchi, M. Repossi, W. Eyssa, P. Arcioni, and F. Svelto, “Design of Low-Loss Transmission Lines in Scaled CMOS by Accurate Electromagnetic Simulations,” Solid-State Circuits, IEEE Journal of, vol. 44, iss. 9, pp. 2605-2615, 2009.
    [Bibtex]
    @ARTICLE{2009Vecchi,
      author = {Vecchi, F. and Repossi, M. and Eyssa, W. and Arcioni, P. and Svelto,
      F.},
      title = {Design of Low-Loss Transmission Lines in Scaled CMOS by Accurate
      Electromagnetic Simulations},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2009},
      volume = {44},
      pages = {2605-2615},
      number = {9},
      month = {Sept},
      doi = {10.1109/JSSC.2009.2023277},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;coplanar waveguides;field effect MIMIC;impedance
      matching;Floquet theorem;IC planarization;coplanar waveguides;electromagnetic
      parameter;fast simulation method;impedance matching;leveraging lines
      periodicity;low-loss transmission line design;millimeter-wave CMOS
      RF circuits;on-chip function;physical structure;shielded CPW lines;size
      65 nm;CMOS integrated circuits;CMOS technology;Electromagnetic analysis;Electromagnetic
      shielding;Filtering;Impedance matching;Matched filters;Planarization;Transmission
      line theory;Transmission lines;CMOS;EM simulators;millimeter-wave
      integrated circuits;transmission lines;wireless transceivers},
      timestamp = {2015.03.04}
    }
  • F. Vecchi, M. Repossi, W. Eyssa, P. Arcioni, and F. Svelto, “Analysis of loss mechanisms in coplanar waveguides integrated on bulk CMOS substrates,” in Microwave Conference, 2009. EuMC 2009. European, 2009, pp. 189-192.
    [Bibtex]
    @INPROCEEDINGS{2009Vecchia,
      author = {Vecchi, F. and Repossi, M. and Eyssa, W. and Arcioni, P. and Svelto,
      F.},
      title = {Analysis of loss mechanisms in coplanar waveguides integrated on
      bulk CMOS substrates},
      booktitle = {Microwave Conference, 2009. EuMC 2009. European},
      year = {2009},
      pages = {189-192},
      month = {Sept},
      keywords = {CMOS integrated circuits;MIMIC;coplanar transmission lines;coplanar
      waveguides;integrated circuit design;transceivers;bulk CMOS substrate;coplanar
      waveguide transmission line;design optimization;integrated transmission
      line;loss mechanism;millimeter wave on-chip;transceiver RF block;CMOS
      process;Conductivity;Conductors;Coplanar waveguides;Dielectric substrates;Impedance;Inductors;Propagation
      losses;Radio frequency;Spirals},
      timestamp = {2015.03.04}
    }

2008

  • [DOI] S. Bozzola, D. Guermandi, A. Mazzanti, and F. Svelto, “An 11.5% frequency tuning, -184 dBc/Hz noise FOM 54 GHz VCO,” in Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE, 2008, pp. 657-660.
    [Bibtex]
    @INPROCEEDINGS{2008Bozzola,
      author = {Bozzola, S. and Guermandi, D. and Mazzanti, A. and Svelto, F.},
      title = {An 11.5% frequency tuning, -184 dBc/Hz noise FOM 54 GHz VCO},
      booktitle = {Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE},
      year = {2008},
      pages = {657-660},
      month = {June},
      doi = {10.1109/RFIC.2008.4561523},
      issn = {1529-2517},
      keywords = {MOS capacitors;millimetre wave oscillators;varactors;voltage-controlled
      oscillators;FOM;VCO;analog tuning;digital tuning;efficiency 11.5
      percent;frequency 54 GHz;inversion mode MOS;optimize capacitance
      tuning range;power 7.2 mW;size 65 nm;varactor;Capacitance;Frequency
      measurement;Inductors;Noise measurement;Noise robustness;Prototypes;Spirals;Tuning;Varactors;Voltage-controlled
      oscillators;I-MOS varactor;Voltage controlled oscillator;mm-wave},
      timestamp = {2015.03.04}
    }
  • [DOI] R. Brama, L. Larcher, A. Mazzanti, and F. Svelto, “A 30.5 dBm 48% PAE CMOS Class-E PA With Integrated Balun for RF Applications,” Solid-State Circuits, IEEE Journal of, vol. 43, iss. 8, pp. 1755-1762, 2008.
    [Bibtex]
    @ARTICLE{2008Brama,
      author = {Brama, R. and Larcher, L. and Mazzanti, A. and Svelto, F.},
      title = {A 30.5 dBm 48% PAE CMOS Class-E PA With Integrated Balun for RF Applications},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2008},
      volume = {43},
      pages = {1755-1762},
      number = {8},
      month = {Aug},
      doi = {10.1109/JSSC.2008.925605},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;UHF integrated circuits;UHF power amplifiers;baluns;signal
      processing;CMOS class-E power amplifiers;UHF power amplifiers;differential
      cascode topology;frequency 1.6 GHz;frequency 1.7 GHz;integrated baluns;power
      efficiency;signal processing;size 0.13 mum;switching amplifiers;thermal
      dissipation;CMOS technology;Impedance matching;Narrowband;Power amplifiers;Power
      generation;Radio frequency;Radiofrequency amplifiers;Signal processing;Topology;Transmitters;Baluns;CMOS
      power amplifiers;class-E;radio-frequency (RF) circuits;switching
      amplifiers;wireless communications},
      timestamp = {2015.03.04}
    }
  • [DOI] S. Erba, M. Pozzoni, M. Pisati, R. Brama, D. Sanzogni, E. Depaoli, P. Viola, and F. Svelto, “A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR,” in Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE, 2008, pp. 559-562.
    [Bibtex]
    @INPROCEEDINGS{2008Erba,
      author = {Erba, S. and Pozzoni, M. and Pisati, M. and Brama, R. and Sanzogni,
      D. and Depaoli, E. and Viola, P. and Svelto, F.},
      title = {A 10Gb/s receiver with linear backplane equalization and mixer-based
      self-aligned CDR},
      booktitle = {Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE},
      year = {2008},
      pages = {559-562},
      month = {Sept},
      doi = {10.1109/CICC.2008.4672146},
      keywords = {CMOS integrated circuits;clocks;equalisers;CMOS receiver;Nyquist loss;bit
      rate 10 Gbit/s;linear backplane equalization;mixer-based self-aligned
      CDR;size 65 nm;transmission channels;Backplanes;Clocks;Decision feedback
      equalizers;Delay;Integrated circuit interconnections;Interference;Optical
      signal processing;Phase locked loops;Propagation losses;Timing},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, E. Sacchi, P. Andreani, and F. Svelto, “Analysis and Design of a Double-Quadrature CMOS VCO for Subharmonic Mixing at Ka-Band,” Microwave Theory and Techniques, IEEE Transactions on, vol. 56, iss. 2, pp. 355-363, 2008.
    [Bibtex]
    @ARTICLE{2008Mazzantib,
      author = {Mazzanti, A. and Sacchi, E. and Andreani, P. and Svelto, F.},
      title = {Analysis and Design of a Double-Quadrature CMOS VCO for Subharmonic
      Mixing at Ka-Band},
      journal = {Microwave Theory and Techniques, IEEE Transactions on},
      year = {2008},
      volume = {56},
      pages = {355-363},
      number = {2},
      month = {Feb},
      doi = {10.1109/TMTT.2007.914365},
      issn = {0018-9480},
      keywords = {CMOS integrated circuits;circuit tuning;microwave mixers;microwave
      oscillators;phase noise;varactors;voltage-controlled oscillators;Ka-band
      signal processing;current 18 mA;double-quadrature CMOS VCO;four-phase
      oscillator display;frequency 12 GHz to 15.9 GHz;phase noise;size
      65 nm;subharmonic mixing;time-variant analysis;tuning varactor;voltage
      0.8 V;voltage controlled oscillator;CMOS process;Circuit optimization;Displays;Frequency;Noise
      measurement;Phase noise;Q factor;Signal analysis;Signal processing;Voltage-controlled
      oscillators;CMOS;direct conversion;local oscillator (LO) generation;millimeter
      waves;multiphase;phase noise;subharmonic receivers;voltage-controlled
      oscillator (VCO)},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, M. Sosio, M. Repossi, and F. Svelto, “A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase LO Generation in 65nm CMOS,” in Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International, 2008, pp. 216-608.
    [Bibtex]
    @INPROCEEDINGS{2008Mazzantic,
      author = {Mazzanti, A. and Sosio, M. and Repossi, M. and Svelto, F.},
      title = {A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase
      LO Generation in 65nm CMOS},
      booktitle = {Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical
      Papers. IEEE International},
      year = {2008},
      pages = {216-608},
      month = {Feb},
      doi = {10.1109/ISSCC.2008.4523134},
      keywords = {CMOS integrated circuits;low-power electronics;microwave generation;microwave
      receivers;radio receivers;voltage-controlled oscillators;VCO;direct-conversion
      I/Q-receiver front-end;frequency 24 GHz;integrated multiphase LO
      generation;low-power solution;size 65 nm;subharmonic receiver;ultrascaled
      RF CMOS process;Baseband;Capacitors;Frequency conversion;Frequency
      synthesizers;Mixers;Phase noise;Radio frequency;Radiofrequency amplifiers;Transconductors;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] M. Pozzoni, S. Erba, P. Viola, M. Pisati, E. Depaoli, D. Sanzogni, R. Brama, D. Baldi, M. Repossi, and F. Svelto, “A multi standard 1.5 to 10Gb/s latch-based 3-tap DFE receiver with a SSC tolerant CDR for serial backplane communication,” in VLSI Circuits, 2008 IEEE Symposium on, 2008, pp. 172-173.
    [Bibtex]
    @INPROCEEDINGS{2008Pozzoni,
      author = {Pozzoni, M. and Erba, S. and Viola, P. and Pisati, M. and Depaoli,
      E. and Sanzogni, D. and Brama, R. and Baldi, D. and Repossi, M. and
      Svelto, F.},
      title = {A multi standard 1.5 to 10Gb/s latch-based 3-tap DFE receiver with
      a SSC tolerant CDR for serial backplane communication},
      booktitle = {VLSI Circuits, 2008 IEEE Symposium on},
      year = {2008},
      pages = {172-173},
      month = {June},
      doi = {10.1109/VLSIC.2008.4585995},
      keywords = {CMOS integrated circuits;decision feedback equalisers;radio receivers;spread
      spectrum communication;synchronisation;CMOS process;DFE data recovery;DFE
      receiver;SATA/SAS/FC receiver;SSC tolerant CDR;SSC tracking;bit rate
      1.5 Gbit/s to 10 Gbit/s;current 140 mA;eye analysis;self-calibration;serial
      backplane communication;size 65 nm;spread spectrum clock tracking;voltage
      1 V;Backplanes;Clocks;Communication standards;Decision feedback equalizers;Delay;Electronics
      packaging;Feeds;Frequency;Synthetic aperture sonar;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • F. Svelto, M. B. Vahidfar, and M. Brandolini, “Reconfigurable Si RF receiver front-ends for multistandard radios,” in Wireless Technology, 2008. EuWiT 2008. European Conference on, 2008, pp. 33-36.
    [Bibtex]
    @INPROCEEDINGS{2008Svelto,
      author = {Svelto, F. and Vahidfar, M.B. and Brandolini, M.},
      title = {Reconfigurable Si RF receiver front-ends for multistandard radios},
      booktitle = {Wireless Technology, 2008. EuWiT 2008. European Conference on},
      year = {2008},
      pages = {33-36},
      month = {Oct},
      keywords = {low noise amplifiers;mixers (circuits);software radio;transceivers;circuit
      architecture;circuit topology;mixer design;multistandard radios;multistandard
      transceiver;power consumption;reconfigurable low-noise amplifier
      design;reconfigurable silicon RF radio receiver front ends;Bluetooth;Communication
      standards;GSM;Global Positioning System;Radio frequency;Receivers;Roaming;Silicon;Wideband;Wireless
      LAN},
      timestamp = {2015.03.04}
    }
  • [DOI] M. B. Vahidfar, O. Shoaei, and F. Svelto, “A high dynamic range multi-standard CMOS mixer for GSM, UMTS and IEEE802.11b-g-a applications,” in Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE, 2008, pp. 193-196.
    [Bibtex]
    @INPROCEEDINGS{2008Vahidfar,
      author = {Vahidfar, M.B. and Shoaei, O. and Svelto, F.},
      title = {A high dynamic range multi-standard CMOS mixer for GSM, UMTS and
      IEEE802.11b-g-a applications},
      booktitle = {Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE},
      year = {2008},
      pages = {193-196},
      month = {June},
      doi = {10.1109/RFIC.2008.4561416},
      issn = {1529-2517},
      keywords = {3G mobile communication;CMOS integrated circuits;MMIC mixers;UHF integrated
      circuits;UHF mixers;cellular radio;software radio;wireless LAN;GSM;Gilbert
      cell;IEEE 802.11b;IEEE 802.11g;IEEE802.11b;IIP2;UMTS;down-conversion
      mixer;frequency 900 MHz to 6 GHz;multistandard CMOS mixer;parasitic
      capacitor;software defined radios;spiral inductor;transformer based
      programmable inductor;3G mobile communication;Application software;CMOS
      technology;Cellular phones;Computer industry;Dynamic range;GSM;Inductors;Software
      radio;Spirals;CMOS;Software defined radio;dynamic range;highly integrated
      devices;mixer;multi standard;reconfigurable passive components},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Vecchi, M. Repossi, A. Mazzanti, P. Arcioni, and F. Svelto, “A simple and complete circuit model for the coupling between symmetrical spiral inductors in silicon RF-ICs,” in Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE, 2008, pp. 479-482.
    [Bibtex]
    @INPROCEEDINGS{2008Vecchi,
      author = {Vecchi, F. and Repossi, M. and Mazzanti, A. and Arcioni, P. and Svelto,
      F.},
      title = {A simple and complete circuit model for the coupling between symmetrical
      spiral inductors in silicon RF-ICs},
      booktitle = {Radio Frequency Integrated Circuits Symposium, 2008. RFIC 2008. IEEE},
      year = {2008},
      pages = {479-482},
      month = {June},
      doi = {10.1109/RFIC.2008.4561481},
      issn = {1529-2517},
      keywords = {CMOS integrated circuits;electromagnetic coupling;inductors;integrated
      circuit modelling;radiofrequency integrated circuits;CMOS technology;EM
      interference;Si;coupling wideband modeling;cross-coupling effects;inductor
      self-resonance;mutual inductance;silicon RF-IC;symmetrical spiral
      inductors;CMOS technology;Circuit testing;Coupling circuits;Equivalent
      circuits;Inductors;Interference;Radiofrequency integrated circuits;Semiconductor
      device modeling;Silicon;Spirals;Coupling;cross talk;ground shield;inductor;mutual
      inductance;substrate coupling},
      timestamp = {2015.03.04}
    }
  • [DOI] C. Weltin-Wu, E. Temporiti, D. Baldi, and F. Svelto, “A 3GHz Fractional-N All-Digital PLL with Precise Time-to-Digital Converter Calibration and Mismatch Correction,” in Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International, 2008, pp. 344-618.
    [Bibtex]
    @INPROCEEDINGS{2008Weltin-Wu,
      author = {Weltin-Wu, C. and Temporiti, E. and Baldi, D. and Svelto, F.},
      title = {A 3GHz Fractional-N All-Digital PLL with Precise Time-to-Digital
      Converter Calibration and Mismatch Correction},
      booktitle = {Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical
      Papers. IEEE International},
      year = {2008},
      pages = {344-618},
      month = {Feb},
      doi = {10.1109/ISSCC.2008.4523198},
      keywords = {CMOS integrated circuits;calibration;convertors;digital phase locked
      loops;CMOS technology;all-digital phased locked loop;bandwidth 100
      kHz to 2 MHz;fractional synthesizer;frequency 25 MHz;frequency 3
      GHz;mismatch correction;power 9.5 mW;size 65 nm;spur suppression;time-to-digital
      converter calibration;Bandwidth;Calibration;Circuit synthesis;Circuit
      testing;Error correction;Filters;Frequency synthesizers;Phase locked
      loops;Phase modulation;Phase noise},
      timestamp = {2015.03.04}
    }

2007

  • [DOI] R. Brama, L. Larcher, A. Mazzanti, and F. Svelto, “A 1.7-GHz 31dBm differential CMOS Class-E Power Amplifier with 58% PAE,” in Custom Integrated Circuits Conference, 2007. CICC ’07. IEEE, 2007, pp. 551-554.
    [Bibtex]
    @INPROCEEDINGS{2007Brama,
      author = {Brama, R. and Larcher, L. and Mazzanti, A. and Svelto, F.},
      title = {A 1.7-GHz 31dBm differential CMOS Class-E Power Amplifier with 58%
      PAE},
      booktitle = {Custom Integrated Circuits Conference, 2007. CICC '07. IEEE},
      year = {2007},
      pages = {551-554},
      month = {Sept},
      doi = {10.1109/CICC.2007.4405792},
      keywords = {CMOS integrated circuits;UHF amplifiers;differential amplifiers;harmonics
      suppression;power amplifiers;2nd harmonic suppression;CMOS technology;cascode
      device;differential CMOS class-E power amplifier;frequency 1.7 GHz;potential
      on-chip interference;power-added efficiency;radio frequency;thick
      oxide devices;CMOS technology;Differential amplifiers;Harmonics suppression;Interference
      suppression;Power amplifiers;Power generation;Power system harmonics;Prototypes;Radio
      frequency;Radiofrequency amplifiers},
      timestamp = {2015.03.04}
    }
  • [DOI] M. Brandolini, M. Sosio, and F. Svelto, “A 750 mV Fully Integrated Direct Conversion Receiver Front-End for GSM in 90-nm CMOS,” Solid-State Circuits, IEEE Journal of, vol. 42, iss. 6, pp. 1310-1317, 2007.
    [Bibtex]
    @ARTICLE{2007Brandolini,
      author = {Brandolini, M. and Sosio, M. and Svelto, F.},
      title = {A 750 mV Fully Integrated Direct Conversion Receiver Front-End for
      GSM in 90-nm CMOS},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2007},
      volume = {42},
      pages = {1310-1317},
      number = {6},
      month = {June},
      doi = {10.1109/JSSC.2007.897131},
      issn = {0018-9200},
      keywords = {CMOS analogue integrated circuits;cellular radio;radio receivers;1/f
      noise;CMOS technology;GSM;cellular phone applications;downconversion
      mixers;feedback loop;integrated direct conversion receiver front-end;pseudo-differential
      transconductor;receiver front-end;second-order intermodulation distortion
      mechanisms;Application specific integrated circuits;Dynamic range;Feedback
      loop;GSM;Intermodulation distortion;Low voltage;Noise figure;Radio
      frequency;Radiofrequency integrated circuits;Signal design;CMOS analog
      integrated circuits;DC offset;GSM;IIP2;IIP3;RF receiver;direct conversion;low-noise
      amplifier (LNA);mismatch;mixer;second-order distortion;self mixing},
      timestamp = {2015.03.04}
    }
  • [DOI] G. Cusmai, M. Repossi, G. Albasini, A. Mazzanti, and F. Svelto, “A Magnetically Tuned Quadrature Oscillator,” Solid-State Circuits, IEEE Journal of, vol. 42, iss. 12, pp. 2870-2877, 2007.
    [Bibtex]
    @ARTICLE{2007Cusmai,
      author = {Cusmai, G. and Repossi, M. and Albasini, G. and Mazzanti, A. and
      Svelto, F.},
      title = {A Magnetically Tuned Quadrature Oscillator},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2007},
      volume = {42},
      pages = {2870-2877},
      number = {12},
      month = {Dec},
      doi = {10.1109/JSSC.2007.908727},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;magnetic fields;oscillators;transformer windings;tuning;varactors;MOS
      varactors;continuous frequency tuning;frequency 3.5 GHz;frequency
      6.4 GHz;frequency 7.3 GHz;magnetic coupling;magnetic field;magnetically
      tuned quadrature oscillator;noise figure 170.5 dB;noise figure 176.5
      dB;phase noise;power 24 mW;quadrature generator;size 65 nm;transformer
      windings;transformer-capacitor oscillator cells;transformer-capacitor
      tank;Capacitors;Feedback loop;Frequency;Joining processes;Magnetic
      fields;Oscillators;Phase noise;Topology;Tuning;Windings;CMOS radio-frequency
      integrated circuits (RFICs);frequency tuning;integrated transformers;local
      oscillators;quadrature voltage-controlled oscillators (VCOs)},
      timestamp = {2015.03.04}
    }
  • [DOI] G. Cusmai, M. Repossi, G. Albasini, and F. Svelto, “A 3.2-to-7.3GHz Quadrature Oscillator with Magnetic Tuning,” in Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International, 2007, pp. 92-589.
    [Bibtex]
    @INPROCEEDINGS{2007Cusmaia,
      author = {Cusmai, G. and Repossi, M. and Albasini, G. and Svelto, F.},
      title = {A 3.2-to-7.3GHz Quadrature Oscillator with Magnetic Tuning},
      booktitle = {Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical
      Papers. IEEE International},
      year = {2007},
      pages = {92-589},
      month = {Feb},
      doi = {10.1109/ISSCC.2007.373603},
      issn = {0193-6530},
      keywords = {capacitors;circuit tuning;magnetic fields;microwave oscillators;phase
      noise;transformers;10 MHz;3.2 to 7.3 GHz;energy tank;frequency tuning;magnetic
      tuning;phase noise;quadrature oscillator;transformer magnetic field;transformer-capacitor
      network;Bonding;CMOS process;Frequency;Inductance;Phase noise;Q factor;Resonance;Spirals;Tuning;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, “State of the art and perspectives in RF and mm-wave microelectronics,” in Research in Microelectronics and Electronics Conference, 2007. PRIME 2007. Ph.D., 2007, pp. 290-290.
    [Bibtex]
    @INPROCEEDINGS{2007Svelto,
      author = {Svelto, F.},
      title = {State of the art and perspectives in RF and mm-wave microelectronics},
      booktitle = {Research in Microelectronics and Electronics Conference, 2007. PRIME
      2007. Ph.D.},
      year = {2007},
      pages = {290-290},
      month = {July},
      doi = {10.1109/RME.2007.4401870},
      keywords = {Analog circuits;CMOS process;CMOS technology;Circuit noise;Microelectronics;Radio
      frequency;Rail to rail amplifiers;Signal processing;Transceivers;Voltage},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, A. Mazzanti, M. Sosio, and M. Repossi, “A CMOS Sub-Harmonic Architecture for Signal Down-Conversion at Ka-Band,” in Radio-Frequency Integration Technology, 2007. RFIT 007. IEEE International Workshop on, 2007, pp. 179-182.
    [Bibtex]
    @INPROCEEDINGS{2007Sveltoa,
      author = {Svelto, F. and Mazzanti, A. and Sosio, M. and Repossi, M.},
      title = {A CMOS Sub-Harmonic Architecture for Signal Down-Conversion at Ka-Band},
      booktitle = {Radio-Frequency Integration Technology, 2007. RFIT 007. IEEE International
      Workshop on},
      year = {2007},
      pages = {179-182},
      month = {Dec},
      doi = {10.1109/RFIT.2007.4443945},
      keywords = {CMOS integrated circuits;intermodulation distortion;microwave receivers;millimetre
      wave receivers;quadrature amplitude modulation;signal processing;CMOS
      sub-harmonic architecture;Ka-band;frequency translation;integrated
      circuit architecture;intermodulation distortion;lower frequency reference;mm-wave
      receiver;quadrature demodulator;quadrature sub-harmonic mixing;signal
      down conversion;signal processing;size 65 nm;tuning elements;Demodulation;Filters;Frequency
      conversion;Frequency synthesizers;Image converters;Mixers;Radio frequency;Signal
      processing;Tuning;Voltage-controlled oscillators;Silicon mmWaves
      Integrated Circuits;direct conversion;multi-phase Voltage Controlled
      Oscillators;sub-harmonic mixers},
      timestamp = {2015.03.04}
    }
  • [DOI] V. D. Torre, M. Conta, R. Chokkalingam, G. Cusmai, P. Rossi, and F. Svelto, “A 20 mW 3.24 mm^2 Fully Integrated GPS Radio for Location Based Services,” Solid-State Circuits, IEEE Journal of, vol. 42, iss. 3, pp. 602-612, 2007.
    [Bibtex]
    @ARTICLE{2007Torre,
      author = {Torre, V.D. and Conta, M. and Chokkalingam, R. and Cusmai, G. and
      Rossi, P. and Svelto, F.},
      title = {A 20 mW 3.24 mm^2 Fully Integrated GPS Radio for Location Based Services},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2007},
      volume = {42},
      pages = {602-612},
      number = {3},
      month = {March},
      doi = {10.1109/JSSC.2006.891723},
      issn = {0018-9200},
      keywords = {Ge-Si alloys;Global Positioning System;band-pass filters;low noise
      amplifiers;microwave mixers;microwave receivers;mobile handsets;phase
      locked loops;radio receivers;voltage-controlled oscillators;0.18
      micron;1 dB;1.9 GHz;2 bit;20 mW;5 dB;GPS receiver;SiGe;automatic
      gain control;cellphone leakage;cellular phones;complex bandpass filter;fractional-N
      PLL;highly selective LNA;integrated GPS radio;location based services;quadrature
      VCO topology;quadrature passive mixer;quantizer;sigma-delta PLL;variable
      gain amplifier;Cellular phones;Energy consumption;Gain;Germanium
      silicon alloys;Global Positioning System;Noise figure;Receivers;Silicon
      germanium;Topology;Voltage-controlled oscillators;Assisted GPS;CMOS;GPS;GSM;cellular;direct
      conversion;wireless receiver},
      timestamp = {2015.03.04}
    }

2006

  • [DOI] F. Agnelli, G. Albasini, I. Bietti, A. Gnudi, A. Lacaita, D. Manstretta, R. Rovatti, E. Sacchi, P. Savazzi, F. Svelto, E. Temporiti, S. Vitali, and R. Castello, “Wireless multi-standard terminals: system analysis and design of a reconfigurable RF front-end,” Circuits and Systems Magazine, IEEE, vol. 6, iss. 1, pp. 38-59, 2006.
    [Bibtex]
    @ARTICLE{2006Agnelli,
      author = {Agnelli, F. and Albasini, G. and Bietti, I. and Gnudi, A. and Lacaita,
      Andrea and Manstretta, D. and Rovatti, R. and Sacchi, E. and Savazzi,
      P. and Svelto, F. and Temporiti, E. and Vitali, S. and Castello,
      R.},
      title = {Wireless multi-standard terminals: system analysis and design of
      a reconfigurable RF front-end},
      journal = {Circuits and Systems Magazine, IEEE},
      year = {2006},
      volume = {6},
      pages = {38-59},
      number = {1},
      month = {First},
      doi = {10.1109/MCAS.2006.1607637},
      issn = {1531-636X},
      keywords = {3G mobile communication;Bluetooth;cellular radio;circuit simulation;reconfigurable
      architectures;wireless LAN;0.13 micron;Bluetooth radio interfaces;DC
      offset;EDGE;GSM;IEEE802.11a/b/g;LAN;UMTS;base-band blocks;current
      driven passive mixers;error rates;frequency down-converter;input
      matching;input noise;integrated transformers;linear amplification
      with non-linear component architecture;low noise amplifier;mixer;multi-standard
      simulator;positive feedback;reconfigurable RF front-end;system analysis;system
      design;tunable VCO;wireless multi-standard terminals;3G mobile communication;Bluetooth;CMOS
      technology;Circuit simulation;GSM;Impedance matching;Radio frequency;Radio
      transmitters;System analysis and design;Wireless LAN},
      timestamp = {2015.03.04}
    }
  • [DOI] R. Brama, L. Larcher, A. Mazzanti, and F. Svelto, “Impact of Scaling on CMOS Radio Frequency Class-E Power Amplifiers,” in Research in Microelectronics and Electronics 2006, Ph. D., 2006, pp. 489-492.
    [Bibtex]
    @INPROCEEDINGS{2006Brama,
      author = {Brama, R. and Larcher, L. and Mazzanti, A. and Svelto, F.},
      title = {Impact of Scaling on CMOS Radio Frequency Class-E Power Amplifiers},
      booktitle = {Research in Microelectronics and Electronics 2006, Ph. D.},
      year = {2006},
      pages = {489-492},
      doi = {10.1109/RME.2006.1690000},
      keywords = {CMOS integrated circuits;power amplifiers;radiofrequency integrated
      circuits;CMOS integrated circuits;class-E power amplifiers;power
      added efficiency;power loss;radiofrequency integrated circuits;Analytical
      models;CMOS analog integrated circuits;CMOS digital integrated circuits;CMOS
      technology;Circuit simulation;High power amplifiers;Power amplifiers;Power
      generation;Radio frequency;Radiofrequency amplifiers},
      timestamp = {2015.03.04}
    }
  • [DOI] M. Brandolini, P. Rossi, D. Sanzogni, and F. Svelto, “A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers,” Solid-State Circuits, IEEE Journal of, vol. 41, iss. 3, pp. 552-559, 2006.
    [Bibtex]
    @ARTICLE{2006Brandolini,
      author = {Brandolini, M. and Rossi, P. and Sanzogni, D. and Svelto, F.},
      title = {A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated
      UMTS receivers},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2006},
      volume = {41},
      pages = {552-559},
      number = {3},
      month = {March},
      doi = {10.1109/JSSC.2005.864123},
      issn = {0018-9200},
      keywords = {3G mobile communication;CMOS analogue integrated circuits;RC circuits;frequency
      convertors;integrated circuit noise;low-power electronics;mixers
      (circuits);radio receivers;0.18 micron;1.8 V;16 dB;4 mA;4.5 MHz;CMOS
      analog integrated circuits;DC offset;IIP2 CMOS direct downconversion
      mixer;RF receiver;fully integrated UMTS receivers;hybrid direct conversion
      architecture;input transconductor;inter-stage surface acoustic wave
      filter;low noise amplifier;out-of-band interferers;parasitic capacitors;second-order
      inter-modulation mechanisms;switching pair;3G mobile communication;Acoustic
      noise;Acoustic waves;Costs;Dynamic range;Filters;Linearity;Low-noise
      amplifiers;Performance analysis;Surface acoustic waves;CMOS analog
      integrated circuits;DC offset;IIP2;IIP3;RF receiver;UMTS;WCDMA;direct
      conversion;mismatch;mixer;second-order distortion;self mixing},
      timestamp = {2015.03.04}
    }
  • [DOI] M. Brandolini, M. Sosio, and F. Svelto, “A 750mV 15kHz 1/f Noise Corner 51dBm IIP2 Direct-Conversion Front-End for GSM in 90nm CMOS,” in Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International, 2006, pp. 1882-1891.
    [Bibtex]
    @INPROCEEDINGS{2006Brandolinia,
      author = {Brandolini, M. and Sosio, M. and Svelto, F.},
      title = {A 750mV 15kHz 1/f Noise Corner 51dBm IIP2 Direct-Conversion Front-End
      for GSM in 90nm CMOS},
      booktitle = {Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical
      Papers. IEEE International},
      year = {2006},
      pages = {1882-1891},
      month = {Feb},
      doi = {10.1109/ISSCC.2006.1696246},
      issn = {0193-6530},
      keywords = {1/f noise;CMOS integrated circuits;cellular radio;mixers (circuits);0.75
      V;1/f noise;15 kHz;15 mA;3.5 dB;31.5 dB;90 nm;CMOS process;GSM;direct-conversion
      front-end;linear mixer;CMOS analog integrated circuits;CMOS process;CMOS
      technology;Feedback loop;GSM;Linearity;Radio frequency;Resistors;Transconductors;Voltage},
      timestamp = {2015.03.04}
    }
  • [DOI] G. Cusmai, M. Brandolini, P. Rossi, and F. Svelto, “A 0.18-um CMOS Selective Receiver Front-End for UWB Applications,” Solid-State Circuits, IEEE Journal of, vol. 41, iss. 8, pp. 1764-1771, 2006.
    [Bibtex]
    @ARTICLE{2006Cusmai,
      author = {Cusmai, G. and Brandolini, M. and Rossi, P. and Svelto, F.},
      title = {A 0.18-um CMOS Selective Receiver Front-End for UWB Applications},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2006},
      volume = {41},
      pages = {1764-1771},
      number = {8},
      month = {Aug},
      doi = {10.1109/JSSC.2006.877256},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;MMIC;OFDM modulation;feedback amplifiers;low
      noise amplifiers;low-pass filters;microwave receivers;mixers (circuits);ultra
      wideband communication;wireless LAN;0.18 micron;1 dB;1.8 V;10 mA;5
      to 6 GHz;CMOS selective receiver front-end;CMOS technology;LNA;OFDM;PCB;UWB
      applications;WLAN interferer rejection;direct-conversion receiver
      front-end;low-noise amplifier;multi-band orthogonal frequency division
      multiplexing;noise figure;quadrature mixer;quadrature topology;second-order
      low-pass filtering;single-ended voltage-voltage feedback amplifier;single-notch
      network;ultra-wideband applications;CMOS integrated circuits;CMOS
      technology;Feedback;Low-noise amplifiers;Network topology;Noise measurement;OFDM;Ultra
      wideband technology;Voltage;Wireless LAN;Blocking;CMOS;RFIC;desensitization;front-end;low
      power;low-noise amplifier (LNA);mixer;multi-resonance;receiver;ultra-wideband
      (UWB);wireless LAN},
      timestamp = {2015.03.04}
    }
  • [DOI] V. Delia Torre, M. Conta, R. Chokkalingam, G. Cusmai, P. Rossi, and F. Svelto, “A 20mw 3.24mm2 fully integrated gps radio for cell-phones,” in Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International, 2006, pp. 1902-1911.
    [Bibtex]
    @INPROCEEDINGS{2006DeliaTorre,
      author = {Delia Torre, V. and Conta, M. and Chokkalingam, R. and Cusmai, G.
      and Rossi, P. and Svelto, F.},
      title = {A 20mw 3.24mm2 fully integrated gps radio for cell-phones},
      booktitle = {Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical
      Papers. IEEE International},
      year = {2006},
      pages = {1902-1911},
      month = {Feb},
      doi = {10.1109/ISSCC.2006.1696248},
      issn = {0193-6530},
      keywords = {BiCMOS integrated circuits;Ge-Si alloys;Global Positioning System;analogue-digital
      conversion;frequency synthesizers;low noise amplifiers;mobile handsets;radio
      receivers;transceivers;0.18 micron;1 dB;1.8 V;1.9 GHz;20 mW;A/D converters;BiCMOS
      technology;GPS radio;GPS receiver;SiGe;cell phones;cellular transceivers;fractional-N
      synthesizer;global positioning system;low noise amplifiers;polyphase
      filters;reciprocal mixing;Cellular phones;Energy consumption;Filtering;Filters;Global
      Positioning System;Integrated circuit noise;Radio frequency;Radio
      transmitters;Receivers;Robustness},
      timestamp = {2015.03.04}
    }
  • [DOI] L. Larcher, D. Sanzogni, R. Brama, A. Mazzanti, and F. Svelto, “Oxide Breakdown After RF Stress: Experimental Analysis and Effects on Power Amplifier Operation,” in Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International, 2006, pp. 283-288.
    [Bibtex]
    @INPROCEEDINGS{2006Larcher,
      author = {Larcher, L. and Sanzogni, D. and Brama, R. and Mazzanti, A. and Svelto,
      F.},
      title = {Oxide Breakdown After RF Stress: Experimental Analysis and Effects
      on Power Amplifier Operation},
      booktitle = {Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE
      International},
      year = {2006},
      pages = {283-288},
      month = {March},
      doi = {10.1109/RELPHY.2006.251229},
      keywords = {CMOS integrated circuits;power amplifiers;radiofrequency integrated
      circuits;semiconductor device reliability;transceivers;CMOS radiofrequency
      transceivers;MOSFET;gate-oxide breakdown;power amplifiers;semiconductor
      device reliability;Degradation;Electric breakdown;MOSFETs;Operational
      amplifiers;Power amplifiers;Radio frequency;Radiofrequency amplifiers;Stress;Transceivers;Voltage;RF
      circuits reliability;oxide breakdown;oxide reliability},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, L. Larcher, R. Brama, and F. Svelto, “Analysis of reliability and power efficiency in cascode class-E PAs,” Solid-State Circuits, IEEE Journal of, vol. 41, iss. 5, pp. 1222-1229, 2006.
    [Bibtex]
    @ARTICLE{2006Mazzanti,
      author = {Mazzanti, A. and Larcher, L. and Brama, R. and Svelto, F.},
      title = {Analysis of reliability and power efficiency in cascode class-E PAs},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2006},
      volume = {41},
      pages = {1222-1229},
      number = {5},
      month = {May},
      doi = {10.1109/JSSC.2006.872734},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;UHF integrated circuits;UHF power amplifiers;integrated
      circuit reliability;0.13 micron;1.4 to 2.0 GHz;1.7 GHz;CMOS power
      amplifier;cascode class-E power amplifier;cascode-based topologies;device
      stacking;power efficiency;radiofrequency circuits;switching amplifier;wireless
      communications;Bandwidth;CMOS technology;Circuit topology;Design
      optimization;Frequency;Power amplifiers;Prototypes;Stacking;Stress;Voltage;CMOS
      power amplifier;Class-E;radio-frequency (RF) circuits;switching amplifier;wireless
      communications},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti and F. Svelto, “A 1.8-GHz injection-locked quadrature CMOS VCO with low phase noise and high phase accuracy,” Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 53, iss. 3, pp. 554-560, 2006.
    [Bibtex]
    @ARTICLE{2006Mazzantia,
      author = {Mazzanti, A. and Svelto, F.},
      title = {A 1.8-GHz injection-locked quadrature CMOS VCO with low phase noise
      and high phase accuracy},
      journal = {Circuits and Systems I: Regular Papers, IEEE Transactions on},
      year = {2006},
      volume = {53},
      pages = {554-560},
      number = {3},
      month = {March},
      doi = {10.1109/TCSI.2005.858161},
      issn = {1549-8328},
      keywords = {CMOS integrated circuits;UHF oscillators;injection locked oscillators;integrated
      circuit noise;mixers (circuits);phase noise;voltage-controlled oscillators;0.18
      micron;1.8 GHz;1.8 V;10 mA;185 dB;3 MHz;600 kHz;CMOS technology;IBR
      measurements;image band rejection measurements;injection-locked oscillators;phase
      noise;quadrature CMOS VCO;upconversion mixer;voltage-controlled oscillators;CMOS
      technology;Capacitance;Frequency conversion;Injection-locked oscillators;Local
      oscillators;Phase noise;Power generation;Prototypes;Radiofrequency
      integrated circuits;Voltage-controlled oscillators;CMOS radio frequency
      integrated circuits;injection locking (IL);local oscillators;phase
      noise;quadrature generation;voltage-controlled oscillators (VCO)},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, F. Svelto, and P. Andreani, “On the amplitude and phase errors of quadrature LC-tank CMOS oscillators,” Solid-State Circuits, IEEE Journal of, vol. 41, iss. 6, pp. 1305-1313, 2006.
    [Bibtex]
    @ARTICLE{2006Mazzantib,
      author = {Mazzanti, A. and Svelto, F. and Andreani, P.},
      title = {On the amplitude and phase errors of quadrature LC-tank CMOS oscillators},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2006},
      volume = {41},
      pages = {1305-1313},
      number = {6},
      month = {June},
      doi = {10.1109/JSSC.2006.874333},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;radiofrequency oscillators;voltage-controlled
      oscillators;CMOS oscillator;CMOS process;amplitude error;amplitude
      imbalance;component mismatch;frequency up-converter;parasitic inductor
      coupling;parasitic magnetic field;phase error;phase imbalance;quadrature
      LC oscillator;quadrature LC tank;small signal circuit;Amplitude estimation;Circuit
      topology;Coupling circuits;Differential equations;Displays;Inductors;Magnetic
      analysis;Magnetic fields;Oscillators;Phase estimation;CMOS radio
      frequency integrated circuits;image rejection;local oscillators;phase
      accuracy;quadrature voltage-controlled oscillators (QVCOs)},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, “Fully integrated receiver front-ends for cell-phones in deep submicron CMOS,” in Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 IEEE, 2006, p. 4 pp.-.
    [Bibtex]
    @INPROCEEDINGS{2006Svelto,
      author = {Svelto, F.},
      title = {Fully integrated receiver front-ends for cell-phones in deep submicron
      CMOS},
      booktitle = {Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 IEEE},
      year = {2006},
      pages = {4 pp.-},
      month = {June},
      doi = {10.1109/RFIC.2006.1651146},
      keywords = {CMOS integrated circuits;mixers (circuits);radio receivers;radiofrequency
      integrated circuits;CMOS active mixers;cell phones;deep submicron
      CMOS;fully integrated receiver front-ends;intermodulation distortion;3G
      mobile communication;Circuits;Dynamic range;GSM;Low voltage;Mixers;RF
      signals;Radio frequency;Resistors;Transconductors},
      timestamp = {2015.03.04}
    }

2005

  • [DOI] A. Bevilacqua and F. Svelto, “Statistical analysis of second-order intermodulation distortion in WCDMA direct conversion receivers,” Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 52, iss. 3, pp. 117-121, 2005.
    [Bibtex]
    @ARTICLE{2005Bevilacqua,
      author = {Bevilacqua, A. and Svelto, F.},
      title = {Statistical analysis of second-order intermodulation distortion in
      WCDMA direct conversion receivers},
      journal = {Circuits and Systems II: Express Briefs, IEEE Transactions on},
      year = {2005},
      volume = {52},
      pages = {117-121},
      number = {3},
      month = {March},
      doi = {10.1109/TCSII.2004.842044},
      issn = {1549-7747},
      keywords = {code division multiple access;intermodulation distortion;receivers;spectral
      analysis;statistical analysis;telecommunication standards;0.18 micron;CMOS
      DCR;WCDMA;accurate modeling;code division multi-access;code multiplexed
      channels;direct conversion receivers;homodyne detection;multichannel
      signal;nonlinear spectral analysis;second-order intermodulation distortion;single-channel
      signal;statistical analysis;stochastic processes;universal mobile
      telecommunications system standard;wideband code division multiple
      access systems;3G mobile communication;Intermodulation distortion;Multiaccess
      communication;Power system modeling;Quadrature phase shift keying;Semiconductor
      device modeling;Spectral analysis;Statistical analysis;Stochastic
      processes;Wideband;Code division multiaccess;homodyne detection;intermodulation
      distortion;spectral analysis;stochastic processes},
      timestamp = {2015.03.04}
    }
  • [DOI] M. Brandolini, P. Rossi, D. Manstretta, and F. Svelto, “Toward multistandard mobile terminals – fully integrated receivers requirements and architectures,” Microwave Theory and Techniques, IEEE Transactions on, vol. 53, iss. 3, pp. 1026-1038, 2005.
    [Bibtex]
    @ARTICLE{2005Brandolini,
      author = {Brandolini, M. and Rossi, P. and Manstretta, D. and Svelto, F.},
      title = {Toward multistandard mobile terminals - fully integrated receivers
      requirements and architectures},
      journal = {Microwave Theory and Techniques, IEEE Transactions on},
      year = {2005},
      volume = {53},
      pages = {1026-1038},
      number = {3},
      month = {March},
      doi = {10.1109/TMTT.2005.843505},
      issn = {0018-9480},
      keywords = {3G mobile communication;Bluetooth;CMOS integrated circuits;cellular
      radio;radio receivers;telecommunication terminals;wireless LAN;Bluetooth
      standard;HiperLAN2 standard;IEEE802.11a standard;IEEE802.11b standard;IEEE802.11g
      standard;direct conversion CMOS implementation;fully integrated CMOS
      receiver;low IF receiver architecture;low cost silicon technology;mobile
      communications;multistandard architecture;multistandard mobile terminal;universal
      mobile telecommunication system;wireless communication;wireless connectivity;wireless
      local area network standard;zero IF receiver architecture;Bluetooth;CMOS
      technology;Communication standards;GSM;Radio frequency;Receivers;Silicon;Telecommunication
      standards;Wireless LAN;Wireless communication;BiCMOS;Bluetooth;CMOS;global
      system for mobile communications (GSM);low IF;low-noise amplifier
      (LNA);mixer;multistandard;radio receivers;universal mobile telecommuniation
      system (UMTS);voltage-controlled oscillator (VCO);wireless communications;wireless
      local area networks (LANs);zero IF},
      timestamp = {2015.03.04}
    }
  • [DOI] M. Brandolini, P. Rossi, D. Sanzogni, and F. Svelto, “A CMOS direct down-converter with outstanding dynamic range performances,” in IEEE-NEWCAS Conference, 2005. The 3rd International, 2005, pp. 5-8.
    [Bibtex]
    @INPROCEEDINGS{2005Brandolinia,
      author = {Brandolini, M. and Rossi, P. and Sanzogni, D. and Svelto, F.},
      title = {A CMOS direct down-converter with outstanding dynamic range performances},
      booktitle = {IEEE-NEWCAS Conference, 2005. The 3rd International},
      year = {2005},
      pages = {5-8},
      month = {June},
      doi = {10.1109/NEWCAS.2005.1496718},
      keywords = {CMOS integrated circuits;convertors;integrated circuit noise;intermodulation
      distortion;passive filters;poles and zeros;0.18 micron;1.8 V;4 mA;CMOS
      direct down-converter;LC filter;RC filter;RF frequency load;dynamic
      range performance;input-referred noise density;load resistor;second
      order intermodulation distortion;signal bandwidth;transconductor;Bandwidth;Distortion;Dynamic
      range;Matched filters;RF signals;Radio frequency;Resistors;Resonant
      frequency;Signal design;Transconductors},
      timestamp = {2015.03.04}
    }
  • [DOI] M. Brandolini, P. Rossi, D. Sanzogni, and F. Svelto, “A CMOS direct down-converter with +78dBm minimum IIP2 for 3G cell-phones,” in Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International, 2005, p. 320-601 Vol. 1.
    [Bibtex]
    @INPROCEEDINGS{2005Brandolinib,
      author = {Brandolini, M. and Rossi, P. and Sanzogni, D. and Svelto, F.},
      title = {A CMOS direct down-converter with +78dBm minimum IIP2 for 3G cell-phones},
      booktitle = {Solid-State Circuits Conference, 2005. Digest of Technical Papers.
      ISSCC. 2005 IEEE International},
      year = {2005},
      pages = {320-601 Vol. 1},
      month = {Feb},
      doi = {10.1109/ISSCC.2005.1493998},
      issn = {0193-6530},
      keywords = {3G mobile communication;CMOS integrated circuits;UHF frequency convertors;cellular
      radio;0.18 micron;1.8 V;3G cellular telephones;4 mA;CMOS direct down-converter;IIP2;Baseband;Capacitors;Filters;Frequency;Impedance;Inductors;Linearity;Surface
      acoustic waves;Transconductors;Voltage},
      timestamp = {2015.03.04}
    }
  • [DOI] G. Cusmai, M. Brandolini, P. Rossi, and F. Svelto, “An interference robust 0.18um CMOS 3.1-8GHz receiver front-end for UWB radio,” in Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005, 2005, pp. 157-160.
    [Bibtex]
    @INPROCEEDINGS{2005Cusmai,
      author = {Cusmai, G. and Brandolini, M. and Rossi, P. and Svelto, F.},
      title = {An interference robust 0.18um CMOS 3.1-8GHz receiver front-end for
      UWB radio},
      booktitle = {Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE
      2005},
      year = {2005},
      pages = {157-160},
      month = {Sept},
      doi = {10.1109/CICC.2005.1568631},
      keywords = {CMOS integrated circuits;low noise amplifiers;low-pass filters;microwave
      receivers;mixers (circuits);radio receivers;ultra wideband technology;0.18
      micron;1 dB;1.8 V;10 mA;3.1 to 8 GHz;5.2 dB;7.3 dB;CMOS technology;WLAN
      interferer rejection;direct conversion integrated circuit;multiband
      OFDM ultra-wide-band applications;receiver front-end;second order
      low pass filter;single-balanced mixer;single-ended low noise amplifier;ultra
      wideband radio;CMOS integrated circuits;CMOS technology;Interference;Low
      pass filters;Noise measurement;OFDM;Receivers;Robustness;Ultra wideband
      technology;Wireless LAN},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, L. Larcher, R. Brama, and F. Svelto, “A 1.4 GHz-2 GHz wideband CMOS class-E power amplifier delivering 23 dBm peak with 67% PAE,” in Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE, 2005, pp. 425-428.
    [Bibtex]
    @INPROCEEDINGS{2005Mazzanti,
      author = {Mazzanti, A. and Larcher, L. and Brama, R. and Svelto, F.},
      title = {A 1.4 GHz-2 GHz wideband CMOS class-E power amplifier delivering
      23 dBm peak with 67% PAE},
      booktitle = {Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest
      of Papers. 2005 IEEE},
      year = {2005},
      pages = {425-428},
      month = {June},
      doi = {10.1109/RFIC.2005.1489832},
      issn = {1529-2517},
      keywords = {CMOS analogue integrated circuits;UHF integrated circuits;UHF power
      amplifiers;inductors;integrated circuit design;network topology;wideband
      amplifiers;0.13 micron;1.4 to 2 GHz;CMOS amplifier;MOS capacitive
      parasitics;cascode topology;device stress;efficiency;integrated inductor;wideband
      CMOS class-E power amplifier;wideband amplifier;Broadband amplifiers;CMOS
      technology;Circuit optimization;Inductors;Power amplifiers;Radio
      frequency;Radiofrequency amplifiers;Stress;Transceivers;Voltage},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, L. Larcher, and F. Svelto, “Balanced CMOS LC-tank analog frequency dividers for quadrature LO generation,” in Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005, 2005, pp. 575-578.
    [Bibtex]
    @INPROCEEDINGS{2005Mazzantia,
      author = {Mazzanti, A. and Larcher, L. and Svelto, F.},
      title = {Balanced CMOS LC-tank analog frequency dividers for quadrature LO
      generation},
      booktitle = {Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE
      2005},
      year = {2005},
      pages = {575-578},
      month = {Sept},
      doi = {10.1109/CICC.2005.1568733},
      keywords = {CMOS integrated circuits;Q-factor;analogue circuits;frequency dividers;injection
      locked oscillators;signal generators;0.18 micron;1.5 pF;8 mA;CMOS
      prototypes;LC-tank balanced divider;analog frequency dividers;band
      edge;image rejection;injection locked frequency dividers;operation
      bandwidth;output capacitance;quadrature LO generation;quadrature
      accuracy;regenerative circuit;side band up-converter;signal generation;tank
      quality factor;Bandwidth;CMOS technology;Capacitance;Frequency conversion;Inductors;Injection-locked
      oscillators;Performance evaluation;Prototypes;Q factor;Signal generators},
      timestamp = {2015.03.04}
    }
  • [DOI] P. Rossi, A. Liscidini, M. Brandolini, and F. Svelto, “A variable gain RF front-end, based on a Voltage-Voltage feedback LNA, for multistandard applications,” Solid-State Circuits, IEEE Journal of, vol. 40, iss. 3, pp. 690-697, 2005.
    [Bibtex]
    @ARTICLE{2005Rossi,
      author = {Rossi, P. and Liscidini, A. and Brandolini, M. and Svelto, F.},
      title = {A variable gain RF front-end, based on a Voltage-Voltage feedback
      LNA, for multistandard applications},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2005},
      volume = {40},
      pages = {690-697},
      number = {3},
      month = {March},
      doi = {10.1109/JSSC.2005.843631},
      issn = {0018-9200},
      keywords = {BiCMOS integrated circuits;Ge-Si alloys;IEEE standards;feedback amplifiers;radio
      receivers;wireless LAN;0.25 micron;2.5 V;2.5 dB;31.5 dB;5 to 6 GHz;BiCMOS
      process;HiSWANa;HiperLAN2;IEEE 802.11a;Q mixers;RF front-ends;RF
      receiver;SiGe;WLAN applications;direct conversion;feedback amplifier;feedback
      circuits;frequency transfer function;low noise amplifier;multistandard
      receivers;narrow-band filter;power consumption;voltage-voltage feedback;wireless
      local area network;Acoustic reflection;Feedback circuits;Filters;Gain;Impedance;Multi-stage
      noise shaping;Narrowband;Radio frequency;Transfer functions;Voltage;BiCMOS;HiSWANa;HiperLAN2;IEEE
      802.11a;RF receiver;direct conversion;feedback amplifier;low noise
      amplifier (LNA);mixer;multiband;multistandard;wireless local area
      network (WLAN)},
      timestamp = {2015.03.04}
    }
  • [DOI] M. Yavari, O. Shoaei, and F. Svelto, “Hybrid cascode compensation for two-stage CMOS operational amplifiers,” in Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on, 2005, p. 1565-1568 Vol. 2.
    [Bibtex]
    @INPROCEEDINGS{2005Yavari,
      author = {Yavari, M. and Shoaei, O. and Svelto, F.},
      title = {Hybrid cascode compensation for two-stage CMOS operational amplifiers},
      booktitle = {Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium
      on},
      year = {2005},
      pages = {1565-1568 Vol. 2},
      month = {May},
      doi = {10.1109/ISCAS.2005.1464900},
      keywords = {CMOS analogue integrated circuits;circuit simulation;compensation;operational
      amplifiers;poles and zeros;transfer functions;OTA;frequency compensation
      methods;hybrid cascode compensation;open loop signal transfer function;poles
      and zeros estimation;two-stage CMOS operational amplifiers;Bandwidth;CMOS
      integrated circuits;Capacitors;Costs;Frequency;Hybrid integrated
      circuits;Operational amplifiers;Poles and zeros;Resistors;Transfer
      functions},
      timestamp = {2015.03.04}
    }

2004

  • [DOI] F. De Bernarclinis, S. Gambini, R. Vincis, F. Svelto, A. S. Vincentelli, and R. Castello, “Design space exploration for a UMTS front-end exploiting analog platforms,” in Computer Aided Design, 2004. ICCAD-2004. IEEE/ACM International Conference on, 2004, pp. 923-930.
    [Bibtex]
    @INPROCEEDINGS{2004DeBernarclinis,
      author = {De Bernarclinis, F. and Gambini, S. and Vincis, R. and Svelto, F.
      and Vincentelli, A.S. and Castello, R.},
      title = {Design space exploration for a UMTS front-end exploiting analog platforms},
      booktitle = {Computer Aided Design, 2004. ICCAD-2004. IEEE/ACM International Conference
      on},
      year = {2004},
      pages = {923-930},
      month = {Nov},
      doi = {10.1109/ICCAD.2004.1382708},
      issn = {1092-3152},
      keywords = {3G mobile communication;analogue circuits;circuit complexity;integrated
      circuit design;UMTS front-end;analog platforms;circuit-level characteristics;design
      space exploration;dynamic range requirement;hand optimized design;platform-based
      design;second order effects;transistor level design;universal mobile
      telecommunication system;3G mobile communication;Circuit simulation;Design
      methodology;Design optimization;Digital systems;Dynamic range;Libraries;Power
      system modeling;Radio frequency;Space exploration},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Gatta, D. Manstretta, P. Rossi, and F. Svelto, “A fully integrated 0.18-um CMOS direct conversion receiver front-end with on-chip LO for UMTS,” Solid-State Circuits, IEEE Journal of, vol. 39, iss. 1, pp. 15-23, 2004.
    [Bibtex]
    @ARTICLE{2004Gatta,
      author = {Gatta, F. and Manstretta, D. and Rossi, P. and Svelto, F.},
      title = {A fully integrated 0.18-um CMOS direct conversion receiver front-end
      with on-chip LO for UMTS},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2004},
      volume = {39},
      pages = {15-23},
      number = {1},
      month = {Jan},
      doi = {10.1109/JSSC.2003.820865},
      issn = {0018-9200},
      keywords = {3G mobile communication;CMOS integrated circuits;VHF amplifiers;VHF
      oscillators;frequency convertors;radio receivers;radiofrequency integrated
      circuits;0.18 mm;1.8 V;135 MHz;21 mA;21 to 47 dB;5.6 dB;CMOS process;UMTS;Universal
      Mobile Telecommunication System;carrier frequency;continuous-time
      DC offset removal;direct-conversion IC;dynamic range front-end blocks;fully
      integrated direct conversion receiver front-end;in-band IIP3;local
      oscillator generation circuits;low-power superharmonic injection-locking
      technique;minimum IIP2;on-chip LO;out-of-band IIP3;phase noise;quadrature
      generation;quadrature mixers;variable gain amplifiers;variable gain
      low-noise amplifier;3G mobile communication;CMOS integrated circuits;DC
      generators;Dynamic range;Frequency measurement;Gain measurement;Local
      oscillators;Low-noise amplifiers;Noise measurement;Phase measurement},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Liscidini, M. Brandolini, P. Rossi, F. Torrisi, and F. Svelto, “Design methodology of feedback-LNAs for GHz applications,” in Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting, 2004, pp. 253-256.
    [Bibtex]
    @INPROCEEDINGS{2004Liscidini,
      author = {Liscidini, A. and Brandolini, M. and Rossi, P. and Torrisi, F. and
      Svelto, F.},
      title = {Design methodology of feedback-LNAs for GHz applications},
      booktitle = {Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the
      2004 Meeting},
      year = {2004},
      pages = {253-256},
      month = {Sept},
      doi = {10.1109/BIPOL.2004.1365793},
      keywords = {Circuit noise;Current density;Design methodology;Frequency;Impedance
      matching;Linearity;Narrowband;Noise figure;Noise measurement;Tunable
      circuits and devices},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti and F. Svelto, “Injection locked oscillators for quadrature generation at radio frequency,” in Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on, 2004, pp. 124-127.
    [Bibtex]
    @INPROCEEDINGS{2004Mazzanti,
      author = {Mazzanti, A. and Svelto, F.},
      title = {Injection locked oscillators for quadrature generation at radio frequency},
      booktitle = {Microelectronics, 2004. ICM 2004 Proceedings. The 16th International
      Conference on},
      year = {2004},
      pages = {124-127},
      month = {Dec},
      doi = {10.1109/ICM.2004.1434224},
      keywords = {CMOS integrated circuits;injection locked oscillators;low-power electronics;power
      consumption;radiofrequency oscillators;signal generators;transceivers;voltage-controlled
      oscillators;0.18 micron;CMOS technology;RF transceivers;injection
      locked oscillators;low power consumption;quadrature signal generators;radiofrequency
      transceivers;CMOS technology;Degradation;Energy consumption;Filters;Injection-locked
      oscillators;Phase noise;Radio frequency;Signal generators;Transceivers;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, P. Uggetti, R. Battagia, and F. Svelto, “Analysis and design of a dual band reconfigurable VCO,” in Electronics, Circuits and Systems, 2004. ICECS 2004. Proceedings of the 2004 11th IEEE International Conference on, 2004, pp. 37-40.
    [Bibtex]
    @INPROCEEDINGS{2004Mazzantia,
      author = {Mazzanti, A. and Uggetti, P. and Battagia, R. and Svelto, F.},
      title = {Analysis and design of a dual band reconfigurable VCO},
      booktitle = {Electronics, Circuits and Systems, 2004. ICECS 2004. Proceedings
      of the 2004 11th IEEE International Conference on},
      year = {2004},
      pages = {37-40},
      month = {Dec},
      doi = {10.1109/ICECS.2004.1399608},
      keywords = {CMOS analogue integrated circuits;UHF oscillators;inductors;reconfigurable
      architectures;0.13 micron;1.8 GHz;900 MHz;CMOS;GSM900/1800 VCO;LC
      VCO;dual band reconfigurable VCO;oscillation frequency switching;series
      inductor switching;tank Q-factor;tank reactive element;CMOS technology;Dual
      band;Energy consumption;Frequency;Inductors;MOS devices;Phase noise;Switches;Tuning;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, P. Uggetti, and F. Svelto, “Injection locked coupled VCOs for low phase noise and high accuracy quadrature generation,” in Norchip Conference, 2004. Proceedings, 2004, pp. 51-54.
    [Bibtex]
    @INPROCEEDINGS{2004Mazzantib,
      author = {Mazzanti, A. and Uggetti, P. and Svelto, F.},
      title = {Injection locked coupled VCOs for low phase noise and high accuracy
      quadrature generation},
      booktitle = {Norchip Conference, 2004. Proceedings},
      year = {2004},
      pages = {51-54},
      month = {Nov},
      doi = {10.1109/NORCHP.2004.1423820},
      keywords = {CMOS technology;Circuits;Degradation;Noise generators;Noise measurement;Phase
      noise;Power generation;Prototypes;Signal generators;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, P. Uggetti, and F. Svelto, “Analysis and design of injection-locked LC dividers for quadrature generation,” Solid-State Circuits, IEEE Journal of, vol. 39, iss. 9, pp. 1425-1433, 2004.
    [Bibtex]
    @ARTICLE{2004Mazzantic,
      author = {Mazzanti, A. and Uggetti, P. and Svelto, F.},
      title = {Analysis and design of injection-locked LC dividers for quadrature
      generation},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2004},
      volume = {39},
      pages = {1425-1433},
      number = {9},
      month = {Sept},
      doi = {10.1109/JSSC.2004.831596},
      issn = {0018-9200},
      keywords = {3G mobile communication;CMOS integrated circuits;frequency dividers;injection
      locked oscillators;integrated circuit modelling;low-power electronics;phase
      noise;radio receivers;voltage-controlled oscillators;0.18 micron;2
      mA;CMOS integrated circuit;RF CMOS;RF receivers;Universal Mobile
      Telecommunication System;circuit modeling;frequency locking;injection
      locking;injection-locked LC dividers;locking band;phase deviation;phase
      noise;quadrature generation;regenerative frequency dividers;tank
      quality factor;voltage-controlled oscillators;3G mobile communication;CMOS
      technology;Circuits;Frequency conversion;Injection-locked oscillators;Local
      oscillators;Phase measurement;Phase noise;Radio frequency;Voltage-controlled
      oscillators;Direct conversion;RF CMOS;RF receivers;UMTS;VCO;frequency
      dividers;injection locking;phase noise;quadrature;voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] P. Rossi, A. Liscidini, M. Brandolini, and F. Svelto, “A 2.5dB NF direct-conversion receiver front-end for HiperLAN2/IEEE802.11a,” in Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International, 2004, p. 102-516 Vol.1.
    [Bibtex]
    @INPROCEEDINGS{2004Rossi,
      author = {Rossi, P. and Liscidini, A. and Brandolini, M. and Svelto, F.},
      title = {A 2.5dB NF direct-conversion receiver front-end for HiperLAN2/IEEE802.11a},
      booktitle = {Solid-State Circuits Conference, 2004. Digest of Technical Papers.
      ISSCC. 2004 IEEE International},
      year = {2004},
      pages = {102-516 Vol.1},
      month = {Feb},
      doi = {10.1109/ISSCC.2004.1332614},
      issn = {0193-6530},
      keywords = {BiCMOS analogue integrated circuits;Ge-Si alloys;IEEE standards;MMIC
      amplifiers;MMIC mixers;differential amplifiers;feedback amplifiers;integrated
      circuit noise;radio receivers;transceivers;wireless LAN;16 mA;2.5
      V;31.5 dB;4.9 to 5.825 GHz;BiCMOS technology;HiperLAN2/IEEE802.11a;I&Q
      variable-gain mixers;SiGe;differential LNA;direct-conversion receiver
      frontend;frequency-tunable LNA;multi-standard applications;plastic
      package;voltage-voltage feedback;Circuit noise;Circuit topology;Feedback
      circuits;Frequency;Gain;Impedance matching;Inductors;Linearity;MOS
      devices;Noise measurement},
      timestamp = {2015.03.04}
    }

2003

  • [DOI] D. Manstretta, M. Brandolini, and F. Svelto, “Second-order intermodulation mechanisms in CMOS downconverters,” Solid-State Circuits, IEEE Journal of, vol. 38, iss. 3, pp. 394-406, 2003.
    [Bibtex]
    @ARTICLE{2003Manstretta,
      author = {Manstretta, D. and Brandolini, M. and Svelto, F.},
      title = {Second-order intermodulation mechanisms in CMOS downconverters},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2003},
      volume = {38},
      pages = {394-406},
      number = {3},
      month = {Mar},
      doi = {10.1109/JSSC.2002.808310},
      issn = {0018-9200},
      keywords = {CMOS analogue integrated circuits;frequency convertors;intermodulation
      distortion;mixers (circuits);0.18 micron;CMOS active downconverter;UMTS;direct
      conversion architecture;fully-integrated wireless receiver;linear
      direct-conversion CMOS mixer;low intermediate frequency architecture;parasitic
      capacitance;second-order input intercept point;second-order intermodulation
      distortion;self-mixing;superheterodyne receiver;switching-pair mismatch;switching-stage
      common source;transconductor nonlinearity;3G mobile communication;Bandwidth;CMOS
      technology;Frequency conversion;Intermodulation distortion;Mixers;Parasitic
      capacitance;Radio frequency;Receivers;Transconductors},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Mazzanti, P. Uggetti, P. Rossi, and F. Svelto, “Injection locking LC dividers for low power quadrature generation,” in Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003, 2003, pp. 563-566.
    [Bibtex]
    @INPROCEEDINGS{2003Mazzanti,
      author = {Mazzanti, A. and Uggetti, P. and Rossi, P. and Svelto, F.},
      title = {Injection locking LC dividers for low power quadrature generation},
      booktitle = {Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE
      2003},
      year = {2003},
      pages = {563-566},
      month = {Sept},
      doi = {10.1109/CICC.2003.1249461},
      keywords = {CMOS integrated circuits;frequency dividers;injection locked oscillators;low-power
      electronics;phase noise;0.18 micron;4 mA;CMOS direct conversion receiver;I/Q
      generation;coupled voltage controlled oscillators;frequency locking
      range;injection locking LC dividers;injection locking frequency dividers;locking
      band;low power quadrature generation;phase noise;quadrature accuracy;quadrature
      phase deviation;regenerative frequency dividers;CMOS technology;Capacitance;Energy
      consumption;Frequency conversion;Injection-locked oscillators;Phase
      measurement;Phase noise;Power generation;Semiconductor device modeling;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }

2002

  • F. Gatta, D. Manstretta, P. Rossi, and F. Svelto, “A direct conversion CMOS receiver front-end with on-chip LO for UMTS,” in Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European, 2002, pp. 443-446.
    [Bibtex]
    @INPROCEEDINGS{2002Gatta,
      author = {Gatta, F. and Manstretta, D. and Rossi, P. and Svelto, F.},
      title = {A direct conversion CMOS receiver front-end with on-chip LO for UMTS},
      booktitle = {Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings
      of the 28th European},
      year = {2002},
      pages = {443-446},
      month = {Sept},
      keywords = {3G mobile communication;CMOS technology;Frequency conversion;Injection-locked
      oscillators;Mixers;Noise measurement;Performance evaluation;Phase
      measurement;Semiconductor device measurement;Voltage-controlled oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] D. Manstretta, R. Castello, F. Gatta, P. Rossi, and F. Svelto, “A 0.18-um CMOS direct-conversion receiver front-end for UMTS,” in Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International, 2002, p. 240-463 vol.1.
    [Bibtex]
    @INPROCEEDINGS{2002Manstretta,
      author = {Manstretta, D. and Castello, R. and Gatta, F. and Rossi, P. and Svelto,
      F.},
      title = {A 0.18-um CMOS direct-conversion receiver front-end for UMTS},
      booktitle = {Solid-State Circuits Conference, 2002. Digest of Technical Papers.
      ISSCC. 2002 IEEE International},
      year = {2002},
      volume = {1},
      pages = {240-463 vol.1},
      month = {Feb},
      doi = {10.1109/ISSCC.2002.993025},
      keywords = {CMOS analogue integrated circuits;UHF integrated circuits;UHF mixers;cellular
      radio;radio receivers;0.18 micron;1.8 V;1.98 to 2.1 GHz;10 kHz to
      1.92 MHz;15 mA;CMOS direct-conversion receiver front-end;LNA;UMTS
      receiver;quadrature mixers;wireless receivers;1f noise;3G mobile
      communication;Gain;Low-noise amplifiers;Noise figure;Radio frequency;Radio
      transmitters;Radiofrequency amplifiers;Receivers;Signal to noise
      ratio},
      timestamp = {2015.03.04}
    }
  • [DOI] D. Manstretta and F. Svelto, “Analysis and optimization of IIP2 in CMOS direct down-converters,” in Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002, 2002, pp. 243-246.
    [Bibtex]
    @INPROCEEDINGS{2002Manstrettaa,
      author = {Manstretta, D. and Svelto, F.},
      title = {Analysis and optimization of IIP2 in CMOS direct down-converters},
      booktitle = {Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE
      2002},
      year = {2002},
      pages = {243-246},
      doi = {10.1109/CICC.2002.1012805},
      keywords = {CMOS analogue integrated circuits;UHF frequency convertors;UHF integrated
      circuits;UHF mixers;circuit optimisation;integrated circuit modelling;intermodulation
      distortion;radio receivers;0.18 micron;1.8 V;3.2 mA;CMOS direct down-converters;IIP2;RF
      self-mixing;RF to LO leakage;device mismatches;device nonlinearity;fully
      integrated CMOS UMTS receiver front-end;intuitive model;mixer design;second
      order intermodulation;3G mobile communication;Bandwidth;Filters;Frequency
      conversion;Mixers;RF signals;Radio frequency;Receivers;Semiconductor
      device modeling;Tail},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto and R. Castello, “A bond-wire inductor-MOS varactor VCO tunable from 1.8 to 2.4 GHz,” Microwave Theory and Techniques, IEEE Transactions on, vol. 50, iss. 1, pp. 403-407, 2002.
    [Bibtex]
    @ARTICLE{2002Svelto,
      author = {Svelto, F. and Castello, R.},
      title = {A bond-wire inductor-MOS varactor VCO tunable from 1.8 to 2.4 GHz},
      journal = {Microwave Theory and Techniques, IEEE Transactions on},
      year = {2002},
      volume = {50},
      pages = {403-407},
      number = {1},
      month = {Jan},
      doi = {10.1109/22.981292},
      issn = {0018-9480},
      keywords = {CMOS analogue integrated circuits;Q-factor;UHF integrated circuits;UHF
      oscillators;circuit tuning;inductors;phase noise;transceivers;varactors;voltage-controlled
      oscillators;1.8 to 2.4 GHz;2 V;LC-tank CMOS VCO;bond-wire inductor-MOS
      varactor VCO;device noise coefficient;figure-of-merit;optimum design;phase
      noise;power consumption;quality factor;tunable VCO;Bonding;Energy
      consumption;Noise level;Phase noise;Prototypes;Q factor;Signal to
      noise ratio;Varactors;Voltage;Voltage-controlled oscillators},
      timestamp = {2015.03.04}
    }

2001

  • [DOI] F. Gatta, E. Sacchi, F. Svelto, P. Vilmercati, and R. Castello, “A 2-dB noise figure 900-MHz differential CMOS LNA,” Solid-State Circuits, IEEE Journal of, vol. 36, iss. 10, pp. 1444-1452, 2001.
    [Bibtex]
    @ARTICLE{2001Gatta,
      author = {Gatta, F. and Sacchi, E. and Svelto, F. and Vilmercati, P. and Castello,
      R.},
      title = {A 2-dB noise figure 900-MHz differential CMOS LNA},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2001},
      volume = {36},
      pages = {1444-1452},
      number = {10},
      month = {Oct},
      doi = {10.1109/4.953472},
      issn = {0018-9200},
      keywords = {CMOS analogue integrated circuits;UHF amplifiers;UHF integrated circuits;differential
      amplifiers;integrated circuit noise;0.35 micron;17.5 dB;2 dB;2.7
      V;8 mA;900 MHz;RF integrated circuit;circuit topology;differential
      CMOS LNA;inductively degenerated input stage;moderate inversion model;noise
      figure;power dissipation;programmable gain;CMOS technology;Circuit
      noise;Circuit topology;Energy consumption;Low-noise amplifiers;MOS
      devices;Noise figure;Noise measurement;Radio frequency;Radiofrequency
      amplifiers},
      timestamp = {2015.03.04}
    }
  • [DOI] D. Manstretta, R. Castello, and F. Svelto, “Low 1/f noise CMOS active mixers for direct conversion,” Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol. 48, iss. 9, pp. 846-850, 2001.
    [Bibtex]
    @ARTICLE{2001Manstretta,
      author = {Manstretta, D. and Castello, R. and Svelto, F.},
      title = {Low 1/f noise CMOS active mixers for direct conversion},
      journal = {Circuits and Systems II: Analog and Digital Signal Processing, IEEE
      Transactions on},
      year = {2001},
      volume = {48},
      pages = {846-850},
      number = {9},
      month = {Sep},
      doi = {10.1109/82.964998},
      issn = {1057-7130},
      keywords = {1/f noise;CMOS analogue integrated circuits;UHF integrated circuits;UHF
      mixers;flicker noise;integrated circuit design;integrated circuit
      noise;nonlinear network analysis;nonlinear network synthesis;0.35
      micron;1/f noise;100 Hz to 3 kHz;18 dB;2.7 V;6 mA;900 MHz;CMOS active
      mixers;Gilbert cell mixer;RFIC;ReFlex standard;analog integrated
      circuits;direct conversion;flicker noise;frequency conversion;input
      stage;low 1/f active mixers;low biasing current;nMOS transconductors;noise
      analysis;pMOS transconductors;switching stage pMOS devices;Active
      noise reduction;Amplitude modulation;Image converters;MOS devices;Mixers;Noise
      measurement;Performance gain;Prototypes;Radio frequency;Transceivers},
      timestamp = {2015.03.04}
    }
  • [DOI] V. Re, I. Bietti, R. Castello, M. Manghisoni, V. Speziali, and F. Svelto, “Experimental study and modeling of the white noise sources in submicron Pand N-MOSFETs,” Nuclear Science, IEEE Transactions on, vol. 48, iss. 4, pp. 1577-1586, 2001.
    [Bibtex]
    @ARTICLE{2001Re,
      author = {Re, V. and Bietti, I. and Castello, R. and Manghisoni, M. and Speziali,
      V. and Svelto, F.},
      title = {Experimental study and modeling of the white noise sources in submicron
      Pand N-MOSFETs},
      journal = {Nuclear Science, IEEE Transactions on},
      year = {2001},
      volume = {48},
      pages = {1577-1586},
      number = {4},
      month = {Aug},
      doi = {10.1109/23.958399},
      issn = {0018-9499},
      keywords = {MOSFET;hot carriers;nuclear electronics;semiconductor device models;semiconductor
      device noise;thermal noise;channel thermal noise;gate geometries;gate-to-source
      overdrive voltages;hot carriers;low-power circuits;noise-related
      parameters;short-channel effects;submicron N-MOSFETs;submicron P-MOSFETs;submicron
      gate process;substrate parasitic resistors;velocity saturation;white
      noise sources;CMOS technology;Circuit noise;Detectors;Equations;Geometry;Hot
      carriers;MOSFET circuits;Semiconductor device modeling;Voltage;White
      noise},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, S. Deantoni, G. Montagna, and R. Castello, “Implementation of a CMOS LNA plus mixer for GPS applications with no external components,” Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 9, iss. 1, pp. 100-104, 2001.
    [Bibtex]
    @ARTICLE{2001Svelto,
      author = {Svelto, F. and Deantoni, S. and Montagna, G. and Castello, R.},
      title = {Implementation of a CMOS LNA plus mixer for GPS applications with
      no external components},
      journal = {Very Large Scale Integration (VLSI) Systems, IEEE Transactions on},
      year = {2001},
      volume = {9},
      pages = {100-104},
      number = {1},
      month = {Feb},
      doi = {10.1109/92.920823},
      issn = {1063-8210},
      keywords = {CMOS analogue integrated circuits;Global Positioning System;UHF amplifiers;UHF
      integrated circuits;UHF mixers;differential amplifiers;low-power
      electronics;0.35 micron;1.3 GHz;2.8 V;3.8 dB;40 dB;8 mA;GPS;Gilbert
      cell mixer;RF front-end;differential CMOS LNA;low-power design;Frequency
      measurement;Gain measurement;Global Positioning System;Impedance
      matching;Linearity;MOS devices;Resonance;Topology;Tuning;Varactors},
      timestamp = {2015.03.04}
    }

2000

  • [DOI] E. Sacchi, I. Bietti, F. Gatta, F. Svelto, and R. Castello, “A 2 dB NF, fully differential, variable gain, 900 MHz CMOS LNA,” in VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on, 2000, pp. 94-97.
    [Bibtex]
    @INPROCEEDINGS{2000Sacchi,
      author = {Sacchi, E. and Bietti, I. and Gatta, F. and Svelto, F. and Castello,
      R.},
      title = {A 2 dB NF, fully differential, variable gain, 900 MHz CMOS LNA},
      booktitle = {VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on},
      year = {2000},
      pages = {94-97},
      month = {June},
      doi = {10.1109/VLSIC.2000.852860},
      keywords = {CMOS analog integrated circuits;Circuit tuning;Differential amplifiers;Field
      effect MMIC;Inductors;MMIC amplifiers;UHF amplifiers;UHF integrated
      circuits;2 dB;22 dB;8 mA;900 MHz;CMOS;IIP3;LNA;SMD inductor;fully
      differential amplifier;inductively degenerated pairs;on-chip gate
      spiral inductor;packaged dies;shunt configuration;tuning;variable
      gain;voltage gain;Active noise reduction;CMOS technology;Cutoff frequency;Gain;Inductors;MOS
      devices;Noise figure;Noise measurement;Shunt (electrical);Topology},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, S. Deantoni, and R. Castello, “A 1 mA, -120.5 dbc/Hz at 600 kHz from 1.9 GHz fully tuneable LC CMOS VCO,” in Custom Integrated Circuits Conference, 2000. CICC. Proceedings of the IEEE 2000, 2000, pp. 577-580.
    [Bibtex]
    @INPROCEEDINGS{2000Svelto,
      author = {Svelto, F. and Deantoni, S. and Castello, R.},
      title = {A 1 mA, -120.5 dbc/Hz at 600 kHz from 1.9 GHz fully tuneable LC CMOS
      VCO},
      booktitle = {Custom Integrated Circuits Conference, 2000. CICC. Proceedings of
      the IEEE 2000},
      year = {2000},
      pages = {577-580},
      doi = {10.1109/CICC.2000.852734},
      keywords = {CMOS analogue integrated circuits;Q-factor;UHF integrated circuits;UHF
      oscillators;circuit tuning;integrated circuit design;integrated circuit
      noise;phase noise;varactors;variable-frequency oscillators;voltage-controlled
      oscillators;0.35 micron;1 mA;1.8 to 2.45 GHz;2 V;LC-tank VCO;MOS
      varactor;Si;bondwire inductor;fully tuneable LC CMOS VCO;phase noise
      minimisation;Bonding;CMOS technology;Frequency;Inductors;Phase noise;Q
      factor;Topology;Tuning;Varactors;Voltage-controlled oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, S. Deantoni, and R. Castello, “A 1.3 GHz low-phase noise fully tunable CMOS LC VCO,” Solid-State Circuits, IEEE Journal of, vol. 35, iss. 3, pp. 356-361, 2000.
    [Bibtex]
    @ARTICLE{2000Sveltoa,
      author = {Svelto, F. and Deantoni, S. and Castello, R.},
      title = {A 1.3 GHz low-phase noise fully tunable CMOS LC VCO},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2000},
      volume = {35},
      pages = {356-361},
      number = {3},
      month = {March},
      doi = {10.1109/4.826817},
      issn = {0018-9200},
      keywords = {CMOS analogue integrated circuits;UHF integrated circuits;UHF oscillators;circuit
      tuning;compensation;integrated circuit design;phase noise;varactors;voltage-controlled
      oscillators;1.1 to 1.45 GHz;2 V;6 mA;VCO gain variations;compensation;current
      consumption;fully tunable CMOS LC VCO;low-phase noise circuit;metal-oxide-silicon
      varactor;oscillation frequency;process variations;Bonding;CMOS process;Frequency;Inductors;Performance
      evaluation;Phase noise;Prototypes;Spirals;Varactors;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, S. Deantoni, G. Montagna, and R. Castello, “An 8 mA, 3.8 dB NF, 40 dB gain CMOS front-end for GPS applications,” in Low Power Electronics and Design, 2000. ISLPED ’00. Proceedings of the 2000 International Symposium on, 2000, pp. 279-283.
    [Bibtex]
    @INPROCEEDINGS{2000Sveltob,
      author = {Svelto, F. and Deantoni, S. and Montagna, G. and Castello, R.},
      title = {An 8 mA, 3.8 dB NF, 40 dB gain CMOS front-end for GPS applications},
      booktitle = {Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of
      the 2000 International Symposium on},
      year = {2000},
      pages = {279-283},
      doi = {10.1109/LPE.2000.155299},
      keywords = {CMOS analogue integrated circuits;Global Positioning System;UHF amplifiers;UHF
      integrated circuits;UHF mixers;circuit tuning;integrated circuit
      design;integrated circuit noise;low-power electronics;radio receivers;0.35
      micron;1.3 GHz;140 MHz;2.8 V;3.8 dB;40 dB;8 mA;CMOS front-end;GPS
      applications;Gilbert cell;MOS varactor;differential pair;double conversion
      architecture;frequency tuning;fully differential LNA;inductively
      degenerated input stage;low-power operation;mixer;resonant LC load;Frequency;Gain;Global
      Positioning System;MOS devices;Mixers;Noise measurement;Resonance;Topology;Tuning;Varactors},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, S. Manzini, and R. Castello, “A three terminal varactor for RF IC’s in standard CMOS technology,” Electron Devices, IEEE Transactions on, vol. 47, iss. 4, pp. 893-895, 2000.
    [Bibtex]
    @ARTICLE{2000Sveltoc,
      author = {Svelto, F. and Manzini, S. and Castello, R.},
      title = {A three terminal varactor for RF IC's in standard CMOS technology},
      journal = {Electron Devices, IEEE Transactions on},
      year = {2000},
      volume = {47},
      pages = {893-895},
      number = {4},
      month = {Apr},
      doi = {10.1109/16.831011},
      issn = {0018-9383},
      keywords = {CMOS analogue integrated circuits;MIS devices;Q-factor;UHF integrated
      circuits;UHF oscillators;circuit tuning;varactors;voltage-controlled
      oscillators;0.35 micron;1800 MHz;MOS varactor;RF IC;RFIC;VCO tuning
      element;accumulation;capacitance tuning;deep depletion;highly integrated
      CMOS transceivers;standard CMOS technology;three terminal varactor;CMOS
      integrated circuits;CMOS technology;Circuit optimization;Degradation;Immune
      system;MOSFET circuits;Radio frequency;Radiofrequency integrated
      circuits;Tuning;Varactors},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, G. Montagna, S. Deantoni, G. Braschi, and R. Castello, “Solutions for image rejection CMOS LNA,” in Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on, 2000, p. 49-52 vol.3.
    [Bibtex]
    @INPROCEEDINGS{2000Sveltod,
      author = {Svelto, F. and Montagna, G. and Deantoni, S. and Braschi, G. and
      Castello, R.},
      title = {Solutions for image rejection CMOS LNA},
      booktitle = {Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000
      IEEE International Symposium on},
      year = {2000},
      volume = {3},
      pages = {49-52 vol.3},
      doi = {10.1109/ISCAS.2000.855993},
      keywords = {CMOS analogue integrated circuits;Q-factor;UHF amplifiers;UHF integrated
      circuits;cordless telephone systems;frequency control;integrated
      circuit noise;low-power electronics;notch filters;telephone sets;varactors;1.88
      GHz;2.2 GHz;300 MHz;4.5 dB;5.5 dB;DECT applications;Q-enhancement
      circuit;frequency control;highly integrated CMOS receivers;image
      rejection CMOS LNA;integrated MOS varactor;notch filter;wideband
      IF architecture;Active inductors;CMOS technology;Energy consumption;Frequency
      control;Noise figure;Noise measurement;Passive filters;RLC circuits;Tuning;Varactors},
      timestamp = {2015.03.04}
    }

1999

  • [DOI] P. Arcioni, R. Castello, L. Perregrini, E. Sacchi, and F. Svelto, “An innovative modelization of loss mechanism in silicon integrated inductors,” Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol. 46, iss. 12, pp. 1453-1460, 1999.
    [Bibtex]
    @ARTICLE{1999Arcioni,
      author = {Arcioni, P. and Castello, R. and Perregrini, L. and Sacchi, E. and
      Svelto, F.},
      title = {An innovative modelization of loss mechanism in silicon integrated
      inductors},
      journal = {Circuits and Systems II: Analog and Digital Signal Processing, IEEE
      Transactions on},
      year = {1999},
      volume = {46},
      pages = {1453-1460},
      number = {12},
      month = {Dec},
      doi = {10.1109/82.809531},
      issn = {1057-7130},
      keywords = {BiCMOS integrated circuits;CMOS integrated circuits;Q-factor;S-parameters;UHF
      integrated circuits;elemental semiconductors;equivalent circuits;inductors;integrated
      circuit modelling;losses;lumped parameter networks;silicon;1.8 GHz;BiCMOS
      IC;CMOS IC;Q-factor;S-parameters;Si;lumped element equivalent circuit
      model;metal losses;parasitic effects;radio frequency integrated circuit;silicon
      integrated inductor;substrate losses;wideband two-port measurement;BiCMOS
      integrated circuits;CMOS technology;Conductivity;Equivalent circuits;Gallium
      arsenide;Inductors;Integrated circuit technology;Radio frequency;Radiofrequency
      integrated circuits;Silicon},
      timestamp = {2015.03.04}
    }
  • [DOI] R. Castello, I. Bietti, and F. Svelto, “High-frequency analog filters in deep-submicron CMOS technology,” in Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International, 1999, pp. 74-75.
    [Bibtex]
    @INPROCEEDINGS{1999Castello,
      author = {Castello, R. and Bietti, I. and Svelto, F.},
      title = {High-frequency analog filters in deep-submicron CMOS technology},
      booktitle = {Solid-State Circuits Conference, 1999. Digest of Technical Papers.
      ISSCC. 1999 IEEE International},
      year = {1999},
      pages = {74-75},
      month = {Feb},
      doi = {10.1109/ISSCC.1999.759108},
      issn = {0193-6530},
      keywords = {CMOS analogue integrated circuits;VLSI;antialiasing;continuous time
      filters;equalisers;radiofrequency filters;sigma-delta modulation;/spl
      Sigma//spl Delta/ converter;CMOS;anti-alias filters;continuous-time
      filters;data recording channels;deep-submicron technology;equalizers;high-frequency
      analog filters;post processing blocks;preconditioning filters;preprocessing
      blocks;system speed;Bandwidth;CMOS technology;Calibration;Circuits;Crosstalk;Frequency;Low
      pass filters;Resonator filters;Transconductors;Tuning},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, M. Conta, V. Della Torre, and R. Castello, “A low-voltage topology for CMOS RF mixers,” Consumer Electronics, IEEE Transactions on, vol. 45, iss. 2, pp. 299-309, 1999.
    [Bibtex]
    @ARTICLE{1999Svelto,
      author = {Svelto, F. and Conta, M. and Della Torre, V. and Castello, R.},
      title = {A low-voltage topology for CMOS RF mixers},
      journal = {Consumer Electronics, IEEE Transactions on},
      year = {1999},
      volume = {45},
      pages = {299-309},
      number = {2},
      month = {May},
      doi = {10.1109/30.793413},
      issn = {0098-3063},
      keywords = {CMOS integrated circuits;cellular radio;differential amplifiers;mixers
      (circuits);network topology;transceivers;0.5 micron;2 V;21 dB;24
      dB;3.8 mA;CMOS Gilbert cell;CMOS RF mixers;CMOS technology;DCS-1800
      mobile telephone standards;GSM standards;IF stage;IIP3;MOS transistors;RF
      transceivers;bipolar technology;linear down-converters;linear region;low-voltage
      topology;noise figure;quad differential pair;resistive degeneration;single
      side band NF;spurious free dynamic range;supply voltage;CMOS technology;Circuits;Dynamic
      range;Linearity;Low voltage;MOSFETs;Noise figure;Noise measurement;Radio
      frequency;Topology},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, S. Deantoni, and R. Castello, “A 1.3 GHz CMOS VCO with 28% frequency tuning,” in Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999, 1999, pp. 645-648.
    [Bibtex]
    @INPROCEEDINGS{1999Sveltoa,
      author = {Svelto, F. and Deantoni, S. and Castello, R.},
      title = {A 1.3 GHz CMOS VCO with 28% frequency tuning},
      booktitle = {Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999},
      year = {1999},
      pages = {645-648},
      doi = {10.1109/CICC.1999.777363},
      keywords = {CMOS analogue integrated circuits;UHF integrated circuits;UHF oscillators;circuit
      tuning;inductors;phase noise;voltage-controlled oscillators;1.3 GHz;2
      V;6 mA;CMOS;LC-tank VCO;bondwire;component variations;frequency tuning;phase
      noise;spiral inductor;Bonding;CMOS process;Frequency;Inductors;Noise
      measurement;Phase measurement;Spirals;Tuning;Varactors;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, P. Erratico, S. Manzini, and R. Castello, “A metal-oxide-semiconductor varactor,” Electron Device Letters, IEEE, vol. 20, iss. 4, pp. 164-166, 1999.
    [Bibtex]
    @ARTICLE{1999Sveltob,
      author = {Svelto, F. and Erratico, P. and Manzini, S. and Castello, R.},
      title = {A metal-oxide-semiconductor varactor},
      journal = {Electron Device Letters, IEEE},
      year = {1999},
      volume = {20},
      pages = {164-166},
      number = {4},
      month = {April},
      doi = {10.1109/55.753754},
      issn = {0741-3106},
      keywords = {CMOS integrated circuits;Q-factor;UHF integrated circuits;circuit
      tuning;varactors;voltage-controlled oscillators;0.35 micron;1.8 GHz;3.1
      pF;CMOS technology scaling;Q factor;capacitance change;controlling
      voltage;metal-oxide-semiconductor varactor;oxide capacitance;parasitic
      resistance;quality factor;tuning range;variable capacitors;CMOS technology;Integrated
      circuit technology;MOS capacitors;Parasitic capacitance;Q factor;Radio
      frequency;Tuning;Varactors;Voltage control;Voltage-controlled oscillators},
      timestamp = {2015.03.04}
    }

1998

  • [DOI] P. Arcioni, R. Castello, G. De Astis, E. Sacchi, and F. Svelto, “Measurement and modeling of Si integrated inductors,” Instrumentation and Measurement, IEEE Transactions on, vol. 47, iss. 5, pp. 1372-1378, 1998.
    [Bibtex]
    @ARTICLE{1998Arcioni,
      author = {Arcioni, P. and Castello, R. and De Astis, G. and Sacchi, E. and
      Svelto, F.},
      title = {Measurement and modeling of Si integrated inductors},
      journal = {Instrumentation and Measurement, IEEE Transactions on},
      year = {1998},
      volume = {47},
      pages = {1372-1378},
      number = {5},
      month = {Oct},
      doi = {10.1109/19.746613},
      issn = {0018-9456},
      keywords = {S-parameters;elemental semiconductors;equivalent circuits;inductors;silicon;S-parameters;Si;lumped
      element model;parasitic effects;silicon substrate;spiral integrated
      inductor;wideband two-port measurement;CMOS process;CMOS technology;Conductivity;Inductors;Q
      factor;Semiconductor device measurement;Silicon;Spirals;Testing;Wideband},
      timestamp = {2015.03.04}
    }
  • [DOI] P. Arcioni, R. Castello, G. De Astis, E. Sacchi, and F. Svelto, “Design and characterization of Si integrated inductors,” in Instrumentation and Measurement Technology Conference, 1998. IMTC/98. Conference Proceedings. IEEE, 1998, p. 1395-1401 vol.2.
    [Bibtex]
    @INPROCEEDINGS{1998Arcionia,
      author = {Arcioni, P. and Castello, R. and De Astis, G. and Sacchi, E. and
      Svelto, F.},
      title = {Design and characterization of Si integrated inductors},
      booktitle = {Instrumentation and Measurement Technology Conference, 1998. IMTC/98.
      Conference Proceedings. IEEE},
      year = {1998},
      volume = {2},
      pages = {1395-1401 vol.2},
      month = {May},
      doi = {10.1109/IMTC.1998.676983},
      issn = {1091-5281},
      keywords = {BiCMOS integrated circuits;CMOS integrated circuits;S-parameters;electric
      variables measurement;elemental semiconductors;equivalent circuits;inductors;integrated
      circuit design;lumped parameter networks;silicon;substrates;two-port
      networks;BiCMOS;CMOS;S-parameters;Si;Si integrated inductors;Si substrate;lumped
      element model;parasitic effects;performance;spiral integrated inductors;wideband
      two-port measurement;CMOS process;CMOS technology;Conducting materials;Cutoff
      frequency;Inductors;Scattering parameters;Silicon;Spirals;Testing;Thermal
      conductivity},
      timestamp = {2015.03.04}
    }
  • [DOI] P. Arcioni, R. Castello, L. Perregrini, E. Sacchi, and F. Svelto, “An improved lumped-element equivalent circuit for on silicon integrated inductors,” in Radio and Wireless Conference, 1998. RAWCON 98. 1998 IEEE, 1998, pp. 301-304.
    [Bibtex]
    @INPROCEEDINGS{1998Arcionib,
      author = {Arcioni, P. and Castello, R. and Perregrini, L. and Sacchi, E. and
      Svelto, F.},
      title = {An improved lumped-element equivalent circuit for on silicon integrated
      inductors},
      booktitle = {Radio and Wireless Conference, 1998. RAWCON 98. 1998 IEEE},
      year = {1998},
      pages = {301-304},
      month = {Aug},
      doi = {10.1109/RAWCON.1998.709196},
      keywords = {BiCMOS integrated circuits;CMOS integrated circuits;Q-factor;S-parameters;electromagnetic
      coupling;elemental semiconductors;equivalent circuits;inductors;integrated
      circuit modelling;least squares approximations;lumped parameter networks;semiconductor
      device models;silicon;BiCMOS technology;CMOS substrate;Q-factor;RF
      IC;S-parameters;Si;electromagnetic coupling;least square minima;lumped-element
      equivalent circuit;magnetic coupling;metal strips;silicon integrated
      inductors;two-port wide-band measurement;Coupling circuits;Electromagnetic
      coupling;Electromagnetic measurements;Equivalent circuits;Inductors;Q
      factor;Silicon;Spirals;Strips;Wideband},
      timestamp = {2015.03.04}
    }
  • [DOI] F. Svelto, “Very accurate high-frequency noise spectral analysis of P-channel FET’s,” Instrumentation and Measurement, IEEE Transactions on, vol. 47, iss. 2, pp. 417-422, 1998.
    [Bibtex]
    @ARTICLE{1998Svelto,
      author = {Svelto, F.},
      title = {Very accurate high-frequency noise spectral analysis of P-channel
      FET's},
      journal = {Instrumentation and Measurement, IEEE Transactions on},
      year = {1998},
      volume = {47},
      pages = {417-422},
      number = {2},
      month = {Apr},
      doi = {10.1109/19.744184},
      issn = {0018-9456},
      keywords = {CMOS analogue integrated circuits;MOSFET;electric noise measurement;feedback
      amplifiers;instrumentation amplifiers;integrated circuit noise;operational
      amplifiers;preamplifiers;semiconductor device noise;spectral analysers;spectral
      analysis;100 Hz to 10 MHz;CMOS technology;P-channel FET;PMOSEET devices;accurate
      HF noise spectral analysis;bench-unit instrument;cascaded amplifiers;feedback
      amplifiers;intrinsic amplifier contribution;noise model;single FET
      device interface;spectrum analyzers;ultra low-noise amplifier;Bandwidth;Circuit
      noise;FETs;Feedback;Frequency;Instruments;Low-frequency noise;Low-noise
      amplifiers;Spectral analysis;Voltage},
      timestamp = {2015.03.04}
    }

1997

  • [DOI] A. Baschirotto, G. Cesura, F. Rezzi, and F. Svelto, “Low-power BiCMOS continuous-time shaping filter,” Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol. 44, iss. 5, pp. 404-406, 1997.
    [Bibtex]
    @ARTICLE{1997Baschirotto,
      author = {Baschirotto, A. and Cesura, G. and Rezzi, F. and Svelto, F.},
      title = {Low-power BiCMOS continuous-time shaping filter},
      journal = {Circuits and Systems II: Analog and Digital Signal Processing, IEEE
      Transactions on},
      year = {1997},
      volume = {44},
      pages = {404-406},
      number = {5},
      month = {May},
      doi = {10.1109/82.580851},
      issn = {1057-7130},
      keywords = {BiCMOS analogue integrated circuits;band-pass filters;biquadratic
      filters;continuous time filters;detector circuits;integrated circuit
      measurement;integrated circuit noise;nuclear electronics;pulse shaping
      circuits;1.25 mW;18 to 30 ns;2 mum;5 V;BiCMOS continuous-time shaping
      filter;biquadratic band-pass filter structure;biquadratic continuous-time
      filter;chip active area;elementary particles experiments;input referred
      noise;input signal amplitude;integral nonlinearity;microstrip detector
      applications;power consumption;read-out electronics;semi-Gaussian
      response;shaping time;signal shaper;single 5 V power supply;Band
      pass filters;BiCMOS integrated circuits;Capacitors;Elementary particles;Energy
      consumption;Frequency;Preamplifiers;Signal design;Tunable circuits
      and devices;Tuning},
      timestamp = {2015.03.04}
    }
  • R. Castello, M. Conta, V. Della Torre, and F. Svelto, “A low-voltage CMOS downconversion mixer for RF applications,” in Solid-State Circuits Conference, 1997. ESSCIRC ’97. Proceedings of the 23rd European, 1997, pp. 136-139.
    [Bibtex]
    @INPROCEEDINGS{1997Castello,
      author = {Castello, R. and Conta, M. and Della Torre, V. and Svelto, F.},
      title = {A low-voltage CMOS downconversion mixer for RF applications},
      booktitle = {Solid-State Circuits Conference, 1997. ESSCIRC '97. Proceedings of
      the 23rd European},
      year = {1997},
      pages = {136-139},
      month = {Sept},
      keywords = {CMOS technology;Circuits;Costs;Current supplies;Energy consumption;Linearity;Low
      voltage;MOSFETs;Radio frequency;Switches},
      timestamp = {2015.03.04}
    }

1993

  • [DOI] A. Baschirotto, G. Cesura, F. Rezzi, and F. Svelto, “A BiCMOS tunable shaper for detectors of elementary particles,” in Circuits and Systems, 1993., ISCAS ’93, 1993 IEEE International Symposium on, 1993, p. 1077-1080 vol.2.
    [Bibtex]
    @INPROCEEDINGS{1993Baschirotto,
      author = {Baschirotto, A. and Cesura, G. and Rezzi, F. and Svelto, F.},
      title = {A BiCMOS tunable shaper for detectors of elementary particles},
      booktitle = {Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium
      on},
      year = {1993},
      pages = {1077-1080 vol.2},
      month = {May},
      doi = {10.1109/ISCAS.1993.393921},
      keywords = {BiCMOS analogue integrated circuits;Q-factor;analogue processing circuits;biquadratic
      filters;circuit tuning;continuous time filters;integrated circuit
      noise;nuclear electronics;particle detectors;transient response;20
      ns;200 muA;240 mV;BiCMOS tunable shaper;Q-factor adjustment;active
      filters;biquadratic continuous-time filter;electronic read-out channel;elementary
      particles detectors;noise shaper;quality factor;semi-Gaussian response;signal
      processing;transient response;BiCMOS integrated circuits;Detectors;Elementary
      particles;Filters;Network synthesis;Noise shaping;Q factor;Signal
      design;Signal processing;Signal synthesis},
      timestamp = {2015.03.04}
    }
  • [DOI] V. Radeka, S. Rescia, P. F. Manfredi, V. Speziali, and F. Svelto, “JFET monolithic preamplifier with outstanding noise behaviour and radiation hardness characteristics,” Nuclear Science, IEEE Transactions on, vol. 40, iss. 4, pp. 744-749, 1993.
    [Bibtex]
    @ARTICLE{1993Radeka,
      author = {Radeka, V. and Rescia, S. and Manfredi, P.F. and Speziali, V. and
      Svelto, F.},
      title = {JFET monolithic preamplifier with outstanding noise behaviour and
      radiation hardness characteristics},
      journal = {Nuclear Science, IEEE Transactions on},
      year = {1993},
      volume = {40},
      pages = {744-749},
      number = {4},
      month = {Aug},
      doi = {10.1109/23.256654},
      issn = {0018-9499},
      keywords = {field effect integrated circuits;junction gate field effect transistors;linear
      integrated circuits;nuclear electronics;preamplifiers;radiation hardening
      (electronics);semiconductor device noise;JFET monolithic preamplifier;calorimetry;epitaxial
      channel JFETs;large capacitance detectors;low capacitance pre-shower
      detectors;noise;noise behaviour;pinch-off voltage;power dissipation;radiation
      damage;radiation hardness;Capacitance;Current measurement;Density
      measurement;Detectors;Impedance;JFET circuits;Power dissipation;Preamplifiers;Resistors;Voltage
      control},
      timestamp = {2015.03.04}
    }

1992

  • [DOI] V. Radeka, S. Rescia, P. F. Manfredi, V. Speziali, and F. Svelto, “Low noise, high radiation hardness front-end circuits based upon an upgraded JFET monolithic process,” in Nuclear Science Symposium and Medical Imaging Conference, 1992., Conference Record of the 1992 IEEE, 1992, p. 421-423 vol.1.
    [Bibtex]
    @INPROCEEDINGS{1992Radeka,
      author = {Radeka, V. and Rescia, S. and Manfredi, P.F. and Speziali, V. and
      Svelto, F.},
      title = {Low noise, high radiation hardness front-end circuits based upon
      an upgraded JFET monolithic process},
      booktitle = {Nuclear Science Symposium and Medical Imaging Conference, 1992.,
      Conference Record of the 1992 IEEE},
      year = {1992},
      pages = {421-423 vol.1},
      month = {Oct},
      doi = {10.1109/NSSMIC.1992.301279},
      keywords = {junction gate field effect transistors;nuclear electronics;preamplifiers;radiation
      hardening (electronics);semiconductor device noise;buried layer process;calorimetry;dynamic
      behavior;epitaxial channel JFETs;monolithic preamplifiers;noise;pinch-off
      voltage;power dissipation;radiation hardness;Calorimetry;Circuit
      noise;Current measurement;Impedance;JFET circuits;Laboratories;Packaging;Preamplifiers;Resistors;Voltage},
      timestamp = {2015.03.04}
    }

1978

  • [DOI] L. Fiorina, S. Mezzetti, and F. Svelto, “Low-loss Y-coupler for multimode single fibres,” Electronics Letters, vol. 14, iss. 25, pp. 808-809, 1978.
    [Bibtex]
    @ARTICLE{1978Fiorina,
      author = {Fiorina, L. and Mezzetti, S. and Svelto, F.},
      title = {Low-loss Y-coupler for multimode single fibres},
      journal = {Electronics Letters},
      year = {1978},
      volume = {14},
      pages = {808-809},
      number = {25},
      month = {December},
      __markedentry = {[:]},
      doi = {10.1049/el:19780545},
      issn = {0013-5194},
      keywords = {optical couplers;optical fibres;low loss Y coupler;multimode single
      fibres;optical fibres;step index fibre},
      timestamp = {2015.03.04}
    }