Communication circuits


The course is taught by Professor Andrea Mazzanti.


The course is planned for students interested in deepening the knowledge of advanced IC design and in particular addresses the main aspects that concern realization of electronic interfaces for very high speed base-band digital communications in CMOS technology. Applications span from computer interfaces (processor-to-memory, processor-to-peripherals…) to wired and optical communications at speed exceeding 10Gbit/sec.
The course will cover the transceiver architectures and building blocks, starting from a behavioral description of the functionality up to the schematics and circuit design for the realization. More specifically, the students will learn the key aspects of signal integrity, wide-band amplification techniques, high-speed equalizers and systems for clock generation and recovery (PLL, DLL, CDR).
Many practical activities (laboratory) are planned. The students will gain the competences required for system planning and to design the main building blocks for high speed communications over cable and optical channels.


Binary signals and transmission channels
Properties of the random binary signals. Effects of noise, jitter and bandwidth limitations. Characteristics and limitations of wired channels (attenuation, reflections, dispersion, noise and cross-talk) and optical channels (lasers, photodiodes, single- and multi-mode fibers)

Amplifiers and Drivers
Drivers for wireline and semiconductor lasers. Trans-impedance amplifiers, programmable-gain amplifiers, limiters, high-speed comparators. Broad-band circuit techniques: inductive-peaking, Cherry-Hopper amplifier, distributed amplification.

Channel equalization
General concepts and system analysis. Fully analog and mixed-signal equalizers (Transmitter pre-emphasis, Feed-forward Equalizers, Decision-Feedback equalizers). Circuit topologies for very high speed. Adaptation algorithms e techniques.

Generation and recovery of the clock signals
General concepts and system analysis. Phase Locked Loops, Delay Locked Loops. Phase detectors for random binary signals, phase interpolators. Architectures of Clock and Data Recovery. Circuit design for highly integrated solutions.

Programming language for the behavioral description of analog circuits: Verilog-A. Behavioral simulation of a complete transceiver for Gbit/sec communications. Circuit design of the key building blocks with CMOS technology.


A collection of additional teaching materials can be downloaded from here.