Ghilioni, Andrea

Assistant Professor

He was born in Pavia, Italy, in 1984. He received from the University of Pavia, Italy, the B.S. and M.S. degrees with honors in Electronics Engineering in 2006 and 2008 respectively and the Ph.D. degree in Microelectronics in January 2012, with Professor Francesco Svelto as Advisor.

His current research interests cover Silicon-Photonics 3D-assembled transceivers design for data-rates above 50Gbps, and RF/microwave/mm-wave IC design for multi-Gbps wireless communications.


CONTACT

E-mail: andrea.ghilioni@unipv.it
Office: +39 0382 985742


PUBLICATIONS

2016

  • [DOI] E. Temporiti, G. Minoia, M. Repossi, D. Baldi, A. Ghilioni, and F. Svelto, “23.4 A 56Gb/s 300mW silicon-photonics transmitter in 3D-integrated PIC25G and 55nm BiCMOS technologies,” in 2016 IEEE International Solid-State Circuits Conference (ISSCC), 2016, pp. 404-405.
    [Bibtex]
    @INPROCEEDINGS{7418078, 
    author={E. Temporiti and G. Minoia and M. Repossi and D. Baldi and A. Ghilioni and F. Svelto}, 
    booktitle={2016 IEEE International Solid-State Circuits Conference (ISSCC)}, 
    title={23.4 A 56Gb/s 300mW silicon-photonics transmitter in 3D-integrated PIC25G and 55nm BiCMOS technologies}, 
    year={2016}, 
    pages={404-405}, 
    keywords={BiCMOS integrated circuits;electro-optical modulation;elemental semiconductors;equalisers;integrated optoelectronics;optical transceivers;power consumption;silicon;telecommunication power management;3D-integrated PIC25G;BiCMOS technology;MZM architecture;Next generation optical interfaces;Si;bifilar transmission line;bit rate 56 Gbit/s;cost reduction;data center IP traffic;electrical propagation loss;electro-optical conversion;electro-optical transmitter;electronic driver;equalization;extinction ratio;form factor optical module;integrated transmission line;load coupling;optical eye diagram;power 300 mW;power consumption minimization;power-efficient high-speed interconnect;predriving stage;silicon-photonics transmitter;transceiver power efficiency;travelling wave Mach-Zehnder modulator architecture;vertical aperture;BiCMOS integrated circuits;Erbium;High-speed optical techniques;Optical fiber communication;Optical transmitters;Power demand;Silicon photonics}, 
    doi={10.1109/ISSCC.2016.7418078}, 
    month={Jan},}

2015

  • [DOI] M. Cignoli, G. Minoia, M. Repossi, D. Baldi, A. Ghilioni, E. Temporiti, and F. Svelto, “22.9 A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/s,” in 2015 IEEE International Solid-State Circuits Conference – (ISSCC) Digest of Technical Papers, 2015, pp. 1-3.
    [Bibtex]
    @INPROCEEDINGS{7063103, 
    author={M. Cignoli and G. Minoia and M. Repossi and D. Baldi and A. Ghilioni and E. Temporiti and F. Svelto}, 
    booktitle={2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers}, 
    title={22.9 A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/s}, 
    year={2015}, 
    pages={1-3}, 
    keywords={CMOS analogue integrated circuits;driver circuits;elemental semiconductors;integrated optics;integrated optoelectronics;optical transmitters;silicon;three-dimensional integrated circuits;3D-assembly;3D-integrated silicon photonics Mach-Zehnder-based transmitter;FEOL;PIC25G;STMicroelectronics 3Dcompatible silicon-photonics platform;Si;bit rate 25 Gbit/s;bulk CMOS technology;carrier depletion P-N junctions;copper pillars;depletion-mode MZM;dynamic extinction ratio;electronic IC;error-free operation;extinction ratio;front-end of line;interconnection parasitic capacitance;multistage CMOS driver;open optical eye diagrams;optical devices;photonic IC;power-efficient CMOS driver;silicon photonics electro-optical transmitter front-end;size 20 mum;size 65 nm;transmitter optical path;wavelength 1310 nm;CMOS integrated circuits;Delays;Erbium;Optical modulation;Optical transmitters;Silicon photonics}, 
    doi={10.1109/ISSCC.2015.7063103}, 
    ISSN={0193-6530}, 
    month={Feb},}
  • [DOI] M. Bassi, J. Zhao, A. Bevilacqua, A. Ghilioni, A. Mazzanti, and F. Svelto, “A 40-67 GHz Power Amplifier With 13 dBm Psat and 16% PAE in 28 nm CMOS LP,” Solid-State Circuits, IEEE Journal of, vol. PP, iss. 99, pp. 1-11, 2015.
    [Bibtex]
    @ARTICLE{7065334, 
      author={Bassi, M. and Zhao, J. and Bevilacqua, A. and Ghilioni, A. and Mazzanti, A. and Svelto, F.}, 
      journal={Solid-State Circuits, IEEE Journal of}, 
      title={A 40-67 GHz Power Amplifier With 13 dBm Psat and 16% PAE in 28 nm CMOS LP}, 
      year={2015}, 
      month={}, 
      volume={PP}, 
      number={99}, 
      pages={1-11}, 
      keywords={Bandwidth;CMOS integrated circuits;Capacitance;Impedance;Inductors;Power amplifiers;Power generation;Broadband amplifiers;CMOS integrated circuits;coupled resonators;gain-bandwidth product;millimeter wave integrated circuits;power amplifiers;resonator filters}, 
      doi={10.1109/JSSC.2015.2409295}, 
      ISSN={0018-9200}
    }
  • [DOI] M. Cignoli, G. Minoia, M. Repossi, D. Baldi, A. Ghilioni, E. Temporiti, and F. Svelto, “A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/s,” in Solid- State Circuits Conference – (ISSCC), 2015 IEEE International, 2015, pp. 1-3.
    [Bibtex]
    @INPROCEEDINGS{7063103, 
      author={Cignoli, M. and Minoia, G. and Repossi, M. and Baldi, D. and Ghilioni, A. and Temporiti, E. and Svelto, F.}, 
      booktitle={Solid- State Circuits Conference - (ISSCC), 2015 IEEE International}, 
      title={A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/s}, 
      year={2015}, 
      month={Feb}, 
      pages={1-3}, 
      keywords={CMOS analogue integrated circuits;driver circuits;elemental semiconductors;integrated optics;integrated optoelectronics;optical transmitters;silicon;three-dimensional integrated circuits;3D-assembly;3D-integrated silicon photonics Mach-Zehnder-based transmitter;FEOL;PIC25G;STMicroelectronics 3Dcompatible silicon-photonics platform;Si;bit rate 25 Gbit/s;bulk CMOS technology;carrier depletion P-N junctions;copper pillars;depletion-mode MZM;dynamic extinction ratio;electronic IC;error-free operation;extinction ratio;front-end of line;interconnection parasitic capacitance;multistage CMOS driver;open optical eye diagrams;optical devices;photonic IC;power-efficient CMOS driver;silicon photonics electro-optical transmitter front-end;size 20 mum;size 65 nm;transmitter optical path;wavelength 1310 nm;CMOS integrated circuits;Delays;Erbium;Optical modulation;Optical transmitters;Silicon photonics}, 
      doi={10.1109/ISSCC.2015.7063103}
    }
  • [DOI] F. Svelto, A. Ghilioni, E. Monaco, E. Mammei, and A. Mazzanti, “The Impact of CMOS Scaling on the Design of Circuits for mm-Wave Frequency Synthesizers,” in High-Performance AD and DA Converters, IC Design in Scaled Technologies, and Time-Domain Signal Processing, P. Harpe, A. Baschirotto, and K. A. A. Makinwa, Eds., Springer International Publishing, 2015, pp. 233-252.
    [Bibtex]
    @INCOLLECTION{2015Svelto,
      author = {Svelto, Francesco and Ghilioni, Andrea and Monaco, Enrico and Mammei,
      Enrico and Mazzanti, Andrea},
      title = {The Impact of CMOS Scaling on the Design of Circuits for mm-Wave
      Frequency Synthesizers},
      booktitle = {High-Performance AD and DA Converters, IC Design in Scaled Technologies,
      and Time-Domain Signal Processing},
      publisher = {Springer International Publishing},
      year = {2015},
      editor = {Harpe, Pieter and Baschirotto, Andrea and Makinwa, Kofi A. A.},
      pages = {233-252},
      doi = {10.1007/978-3-319-07938-7_10},
      isbn = {978-3-319-07937-0},
      language = {English},
      timestamp = {2015.03.04},
      url = {http://dx.doi.org/10.1007/978-3-319-07938-7_10}
    }

2014

  • [DOI] E. Temporiti, G. Minoia, M. Repossi, D. Baldi, A. Ghilioni, and F. Svelto, “A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm CMOS technologies,” in European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 – 40th, 2014, pp. 131-134.
    [Bibtex]
    @INPROCEEDINGS{2014Temporiti,
      author = {Temporiti, E. and Minoia, G. and Repossi, M. and Baldi, D. and Ghilioni,
      A. and Svelto, F.},
      title = {A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm
      CMOS technologies},
      booktitle = {European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014
      - 40th},
      year = {2014},
      pages = {131-134},
      month = {Sept},
      doi = {10.1109/ESSCIRC.2014.6942039},
      issn = {1930-8833},
      keywords = {CMOS integrated circuits;copper;elemental semiconductors;integrated
      optics;integrated optoelectronics;optical interconnections;optical
      waveguides;photodiodes;silicon;3D-compatible silicon photonics platform;3D-integrated
      silicon photonics receiver;BER;CMOS amplification chain;CMOS technologies;Cu;Ge;PIC25G;STMicroelectronics;Si;bit
      rate 25 Gbit/s;copper pillars;germanium photodiode;integrated photonics;integrated
      waveguide;optical devices;optical interconnects;optical power sensitivity;optoelectronic
      receiver;photonics integrated circuits;size 65 nm;wavelength 1310
      nm;CMOS integrated circuits;Copper;Optical receivers;Optical sensors;Sensitivity;Silicon
      photonics;3D integration;PIC;Silicon photonics;copper pillars;optical
      receiver;sensitivity},
      timestamp = {2015.03.04}
    }
  • [DOI] J. Zhao, M. Bassi, A. Bevilacqua, A. Ghilioni, A. Mazzanti, and F. Svelto, “A 40-67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS LP,” in European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 – 40th, 2014, pp. 179-182.
    [Bibtex]
    @INPROCEEDINGS{2014Zhao,
      author = {Junlei Zhao and Bassi, M. and Bevilacqua, A. and Ghilioni, A. and
      Mazzanti, A. and Svelto, F.},
      title = {A 40-67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS
      LP},
      booktitle = {European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014
      - 40th},
      year = {2014},
      pages = {179-182},
      month = {Sept},
      doi = {10.1109/ESSCIRC.2014.6942051},
      issn = {1930-8833},
      keywords = {CMOS analogue integrated circuits;differential amplifiers;field effect
      MIMIC;impedance matching;low-power electronics;millimetre wave power
      amplifiers;millimetre wave resonators;wideband amplifiers;CMOS LP;Norton
      transformations;PAE;PSAT;efficiency 16 percent;frequency 40 GHz to
      67 GHz;impedance matching;low-power devices;mm-wave PAs;neutralized
      common source stages;output matching networks;size 28 nm;two-stage
      differential PA;wideband inductively coupled resonators;wideband
      power amplifiers;wireless applications;Bandwidth;CMOS integrated
      circuits;Gain;Impedance;Impedance matching;Inductors;Power generation},
      timestamp = {2015.03.04}
    }

2013

  • [DOI] A. Ghilioni, A. Mazzanti, and F. Svelto, “Analysis and Design of mm-Wave Frequency Dividers Based on Dynamic Latches With Load Modulation,” Solid-State Circuits, IEEE Journal of, vol. 48, iss. 8, pp. 1842-1850, 2013.
    [Bibtex]
    @ARTICLE{2013Ghilioni,
      author = {Ghilioni, A. and Mazzanti, A. and Svelto, F.},
      title = {Analysis and Design of mm-Wave Frequency Dividers Based on Dynamic
      Latches With Load Modulation},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2013},
      volume = {48},
      pages = {1842-1850},
      number = {8},
      month = {Aug},
      doi = {10.1109/JSSC.2013.2258793},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;flip-flops;frequency dividers;inspection;low-power
      electronics;time-domain analysis;bulk CMOS;date injection locked
      topologies;dynamic latches;hold times;load modulation;maximum charge
      retention;maximum operation frequency;minimum operation frequency;mm-wave
      frequency dividers;power 4.8 mW;size 32 nm;static CML latches;time-domain
      circuit inspection;transceivers;wideband low-power frequency dividers;Clocks;Frequency
      conversion;Frequency modulation;Latches;Resistance;Switches;Time-frequency
      analysis;CMOS technology;frequency divider;integrated circuits modeling;low
      power electronics;millimeter wave analog integrated circuits;wideband},
      timestamp = {2015.03.04}
    }

2012

  • [DOI] A. Ghilioni, U. Decanis, A. Mazzanti, and F. Svelto, “A 4.8mW inductorless CMOS frequency divider-by-4 with more than 60% fractional bandwidth up to 70GHz,” in Custom Integrated Circuits Conference (CICC), 2012 IEEE, 2012, pp. 1-4.
    [Bibtex]
    @INPROCEEDINGS{2012Ghilioni,
      author = {Ghilioni, A. and Decanis, U. and Mazzanti, A. and Svelto, F.},
      title = {A 4.8mW inductorless CMOS frequency divider-by-4 with more than 60%
      fractional bandwidth up to 70GHz},
      booktitle = {Custom Integrated Circuits Conference (CICC), 2012 IEEE},
      year = {2012},
      pages = {1-4},
      month = {Sept},
      doi = {10.1109/CICC.2012.6330595},
      issn = {0886-5930},
      keywords = {CMOS integrated circuits;differential amplifiers;frequency dividers;frequency
      synthesizers;bandwidth 14 GHz to 70 GHz;clocked differential amplifiers;dynamic
      CML latches;fractional bandwidth;frequency synthesizers;inductorless
      CMOS frequency divider-by-4;large division factors;load resistance;power
      4.8 mW;size 32 nm;tail current;wide-band low-power dividers;Bandwidth;CMOS
      integrated circuits;Clocks;Frequency conversion;Latches;Power demand;Resistance;Frequency
      divider and CMOS technology;Low power electronics;Millimeter wave
      circuits;Wideband},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Ghilioni, E. Monaco, M. Repossi, and A. Mazzanti, “A 5mW CMOS wideband mm-wave front-end featuring 17dB of conversion gain and 6.5 dB minimum NF,” in Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE, 2012, pp. 447-450.
    [Bibtex]
    @INPROCEEDINGS{2012Ghilionia,
      author = {Ghilioni, A. and Monaco, E. and Repossi, M. and Mazzanti, A.},
      title = {A 5mW CMOS wideband mm-wave front-end featuring 17dB of conversion
      gain and 6.5 dB minimum NF},
      booktitle = {Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE},
      year = {2012},
      pages = {447-450},
      month = {June},
      doi = {10.1109/RFIC.2012.6242319},
      issn = {1529-2517},
      keywords = {CMOS analogue integrated circuits;MMIC amplifiers;field effect MMIC;low
      noise amplifiers;microwave resonators;CMOS stand-alone LNA;CMOS wideband
      mm-wave front-end;current to voltage conversion;frequency 18.5 GHz;front-end
      noise figure;gain 17 dB;intermediate frequency;low-noise amplifiers;mixer;mm-wave
      signal;noise figure 6.5 dB;passive components;phased arrays;power
      5 mW;power dissipation;quality factor;resonator impedance magnitude;size
      65 nm;test chips;wireless data transfers;CMOS integrated circuits;Gain;Mixers;Noise;Noise
      figure;Radio frequency;CMOS technology;Low-noise amplifiers;Millimeter
      wave integrated circuits;mixers;phased arrays},
      timestamp = {2015.03.04}
    }

2011

  • [DOI] U. Decanis, A. Ghilioni, E. Monaco, A. Mazzanti, and F. Svelto, “A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators and a Wideband Frequency Divider at Millimeter Waves,” Solid-State Circuits, IEEE Journal of, vol. 46, iss. 12, pp. 2943-2955, 2011.
    [Bibtex]
    @ARTICLE{2011Decanis,
      author = {Decanis, U. and Ghilioni, A. and Monaco, E. and Mazzanti, A. and
      Svelto, F.},
      title = {A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators
      and a Wideband Frequency Divider at Millimeter Waves},
      journal = {Solid-State Circuits, IEEE Journal of},
      year = {2011},
      volume = {46},
      pages = {2943-2955},
      number = {12},
      month = {Dec},
      doi = {10.1109/JSSC.2011.2162468},
      issn = {0018-9200},
      keywords = {CMOS integrated circuits;differential amplifiers;field effect MIMIC;frequency
      dividers;millimetre wave frequency convertors;millimetre wave oscillators;phase
      noise;voltage-controlled oscillators;CMOS process;MIMIC;clocked differential
      amplifiers;current 22 mA;frequency 56 GHz to 60.4 GHz;inter-stage
      passive components;low-noise quadrature VCO;magnetically coupled
      resonators;phase error;phase noise;phased-array systems;power 6.5
      mW;size 65 nm;voltage 1 V;wideband frequency divider;wireless on-chip
      processing;Couplings;Frequency conversion;Phase noise;Resonant frequency;Voltage-controlled
      oscillators;CMOS;direct conversion;frequency divider;low phase noise;low-$k$
      transformer;millimeter wave;quadrature voltage-controlled oscillator
      (VCO)},
      timestamp = {2015.03.04}
    }
  • [DOI] U. Decanis, A. Ghilioni, E. Monaco, A. Mazzanti, and F. Svelto, “A mm-Wave quadrature VCO based on magnetically coupled resonators,” in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International, 2011, pp. 280-282.
    [Bibtex]
    @INPROCEEDINGS{2011Decanisa,
      author = {Decanis, U. and Ghilioni, A. and Monaco, E. and Mazzanti, A. and
      Svelto, F.},
      title = {A mm-Wave quadrature VCO based on magnetically coupled resonators},
      booktitle = {Solid-State Circuits Conference Digest of Technical Papers (ISSCC),
      2011 IEEE International},
      year = {2011},
      pages = {280-282},
      month = {Feb},
      doi = {10.1109/ISSCC.2011.5746318},
      issn = {0193-6530},
      keywords = {1/f noise;CMOS integrated circuits;resonators;voltage-controlled oscillators;1/f
      noise;CMOS technology;compact quadrature generator;cross-coupled
      LC voltage-controlled oscillator;current 22 mA;dividers;double-frequency
      VCO;frequency 1 MHz;frequency 56 GHz to 60.3 GHz;magnetically coupled
      resonator;mm-wave quadrature VCO;size 65 nm;voltage 1 V;CMOS integrated
      circuits;Phase noise;Resonant frequency;Solid state circuits;Tuning;Voltage-controlled
      oscillators},
      timestamp = {2015.03.04}
    }
  • [DOI] A. Ghilioni, U. Decanis, E. Monaco, A. Mazzanti, and F. Svelto, “A 6.5mW inductorless CMOS frequency divider-by-4 operating up to 70GHz,” in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International, 2011, pp. 282-284.
    [Bibtex]
    @INPROCEEDINGS{2011Ghilioni,
      author = {Ghilioni, A. and Decanis, U. and Monaco, E. and Mazzanti, A. and
      Svelto, F.},
      title = {A 6.5mW inductorless CMOS frequency divider-by-4 operating up to
      70GHz},
      booktitle = {Solid-State Circuits Conference Digest of Technical Papers (ISSCC),
      2011 IEEE International},
      year = {2011},
      pages = {282-284},
      month = {Feb},
      doi = {10.1109/ISSCC.2011.5746319},
      issn = {0193-6530},
      keywords = {CMOS integrated circuits;current-mode logic;differential amplifiers;field
      effect MIMIC;flip-flops;frequency dividers;injection locked oscillators;integrated
      circuit interconnections;optical communication;radio transceivers;synchronisation;clock
      synchronization;clocked differential amplifiers;digital calibration;inductorless
      CMOS frequency divider;injection locking;injection-locked oscillators;integrated
      circuit interconnections;mm-wave dividers;nanometer-scale CMOS technology;optical
      communications;power 6.5 mW;radio frequency application;size 65 nm;static
      CML latches;wireless transceivers;CMOS integrated circuits;Capacitors;Clocks;Frequency
      conversion;Latches;Noise measurement;Time frequency analysis},
      timestamp = {2015.03.04}
    }