He was born in Zibo, China, in 1990. He received bachelor degree in Electronic Science and Technology in 2013 from Hefei University of Technology, Hefei, China. He received Master degree in Microelectronics in 2016 from the University of Pavia, Pavia, Italy. During his thesis period, he worked on an Adaptive FIR Equalizer for high speed serial communication.
In May 2016, he received a grant from the University of Pavia in collaboration with STMicroelectronics (Studio di Microelettronica), to research and develop a 56Gb/s PAM-4 equalizer in super-scaled CMOS technology.
Since November 2016, he is working towards the Ph.D. in Microelectronics at University of Pavia, under the supervision of Prof. Andrea Mazzanti. His current research includes high speed wireline communication IC design, with particular emphasis on 56Gb/s PAM-4 equalization techniques.