Spelgatti, Giorgio

Ph.D. 2011

He was born in Trescore Balneario (BG), Italy, in 1983. He received the Bachelor Degree (Summa cum Laude) in Electronic and Telecommunications Engineering from the University of Pavia, Italy, in 2005. In 2007 he received the Master Degree (Summa cum Laude) in Electronic Engineering from the same University with a thesis on digital Clock and Data Recovery circuits for high frequency serial interface.

Since 2007 he is working at the “Studio di Microelettronica” of ST Microelectronics in collaboration with University of Pavia, Italy, as a Ph.D. student. His research activity is focused on serial interfaces and high speed flash ADC.


PUBLICATIONS

  • [DOI] M. Pozzoni, S. Erba, D. Sanzogni, M. Ganzerli, P. Viola, D. Baldi, M. Repossi, G. Spelgatti, and F. Svelto, “A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization,” in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, 2010, pp. 164-165.
    [Bibtex]
    @inproceedings{5434006,
      Author = {Pozzoni, M. and Erba, S. and Sanzogni, D. and Ganzerli, M. and Viola, P. and Baldi, D. and Repossi, M. and Spelgatti, G. and Svelto, F.},
      Booktitle = {Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International},
      Date-Added = {2013-03-22 14:42:03 +0100},
      Date-Modified = {2013-03-22 17:23:59 +0100},
      Doi = {10.1109/ISSCC.2010.5434006},
      Issn = {0193-6530},
      Pages = {164-165},
      Title = {A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization},
      Year = {2010},
      Bdsk-Url-1 = {http://dx.doi.org/10.1109/ISSCC.2010.5434006}}