Lecturer: Francesco Dotti  

Course name: Digital Design and Computer Architecture
Course code: 500540
Degree course: Ingegneria Meccatronica
Disciplinary field of science: ING-INF/05
University credits: CFU 9
Course website: n.d.

Specific course objectives

This course is meant to address the fundamentals of Boole's algebra, the methods and the tecniques of Analisys and Design of the Logic Networks, both combinatorial and sequential, (asynchronous and synchronous) and a description of the functions of the Arithmetic/Logic Unit in the scenario of the architecture of a numeric processor. The practice lessons are about analysis and synthesis of Logical Networks and algorithms for math operations. They aim to the understanding the functions of the Arithmetic/Logic Unit and its performances. Besides, the teaching introduces the architecture of microprocessors and microcomputers, explaining its behavior by the usage of the Assembly Language. The teaching aims to emphasize the relations among the computer architecture, the microelettronics techniques and the base software organization. The practice lessons are related to the Assembly Language and the tuning of simple programs in a dedicated development environment.

Course programme

Introduction to Boole's Algebra
Introduction to Logic and Set Theory; Boole's Algebra; boolean expressions and fuctions; Boole's expansion theorem; first and second canonical form; implicants and implicates; representation of boolean functions; simplification of boolean functions and minimum cost functions (method of Karnaugh maps, method of Tison, method of Quine-McCluskey; Petrick function).

Combinatorial networks
Combinatorial networks;logic variables and electrical signals; elementary electronic components; elementary functional blocks: And, Or, Not, Nor, Nand, Xor, Analysis of Combinatorial networks; Synthesis of Combinatorial networks. Elementary Combinatorial networks: adder, coder and decoder, input and output selector, ROM. Transients in Combinatorial networks: static hazards. Networks with error detection, error-free networks. Diagnosis to terminals.

Sequential networks
Sequential networks: internal state; finite state machines, minimum machines; method of the triangular table, equivalent machines and compatible machines. Asynchronous machines, critical paths. Synchronous machines. Analysis of sequential machines, temporal analysis. Synthesis of sequential machines: states assignment. Remarkable Sequential networks: Flip–Flop, registers, counters, sequence detectors, serial adder.

Architecture of a processor
Functional blocks: memory, arithmetic unit, input and output units, control unit. Units interconnection: bus. Interruption. Hardware e software. Functional blocks flow chart for a processor. instruction flow and data flow. Information representation, relative numbers, conversion between representations, real numbers. Aritmetic unit: representation of relative numbers and their conversions, adders, carry look ahead adders, product, Booth's algorithm, fast multipliers, division algorithms. Real numbers operations.

Assembly language
Addressing tecniques and Assembly instructions. Interrupts management. Assembler, linker-loader, developmente environment and simulator. Examples.

Course entry requirements

Programming fundamentals.

Course structure and teaching

Lectures (hours/year in lecture theatre): 55
Practical class (hours/year in lecture theatre): 24
Practicals / Workshops (hours/year in lecture theatre): 6

Suggested reading materials

I. De Lotto. Appunti di Calcolatori Elettronici. Parte prima: reti logiche e unità aritmetica. Spiegel, Milano 1996.

Patterson D.A., Hennesy J.L.. Computer organization and design: the hardware-software interface. Morgan Kaufmann Publishers, 2004.

Testing and exams

A written test will be followed by an oral examination.