Lecturer: Carla Vacchi  

Course name: Electronics For Digital Systems
Course code: 502515
Degree course: Ingegneria Elettronica e Informatica, Computer Engeneering
Disciplinary field of science: ING-INF/01
L'insegnamento è caratterizzante per: Ingegneria Elettronica e Informatica
University credits: ECTS 6
Course website: http://www-3.unipv.it/vacchi/didattica/ESDig270.php

Specific course objectives

The goal of the course is to provide the basic knowledge for the design of microelectronic CMOS digital systems, from the elementary devices (complementary CMOS and transmission gate based logic structures) to functional blocks of medium complexity. Different approaches (ASIC, FPGA) to integrate a digital system are discussed. The main issues and problems related to the different phases of the design and to the development of a digital circuit are analyzed. Reasons for testing a logic circuit and techniques for design for testability are discussed. At the end of the course, the student will be familiar with electrical aspects of digital electronics, able to design, from the functional description, the schematic and the layout of simple complementary gates and synchronous circuits.

Course programme

Digital Integrated Circuits
CMOS fabrication process, passive components, masks and design rules.

CMOS circuits and basic sequential systems
CMOS gates. Static and dynamic parameters. Transmission gates. Open drain and tri-state outputs. Schmitt trigger inputs. Digital buffers. Layout of a CMOS gate. Level sensitive latch. Edge triggered register. Timing. Registers, binary counters, shift counters.

Adders and multipliers
Addition, change of sign and subtraction of positive integers and signed integers. Range extension and arithmetic shifts. Full adder, Ripple carry adder, Carry Lookahead Adder, Sequential Multiplier, Braun Parallel, Baugh-Wooley and Booth Multipliers.

Digital systems: technology choice
ASIC Standard Cell and Full Custom, Gate Array, Sea of Gates, FPGA. Sistemi digitali: scelta della tecnologia ASIC Standard Cell e Full Custom, Gate Array, Sea of Gates, FPGA.

Testing a digital system
Stuck at, short and open fault, Design For Testability, Built In Self Test, Boundary Scan. Collaudo di sistemi digitali Guasto Stuck at, short e open, Design For Testability, Built In Self Test, Boundary Scan.

Exercises and Laboratory
Exercises on the course topics are solved directly by the teacher, or proposed as homework with professor review to highlight and correct errors and misunderstanding. Experimental laboratories consist in the realisation of simple combinatorial and sequential circuits.

Course entry requirements

Boole’s Algebra. Analysis and synthesis of digital combinatorial systems, unsigned and two’s complement representation, MOSFET, Inverter CMOS, latch. Knowledge of the basic laws governing electrical circuits.

Course structure and teaching

Lectures (hours/year in lecture theatre): 18
Practical class (hours/year in lecture theatre): 30
Practicals / Workshops (hours/year in lecture theatre): 30

Suggested reading materials

Copies of the slides used during the lectures, examples of written tests, instruction manuals and notes provided by the professor for the lab are available from the course website (in italian)

Carla Vacchi. Elettronica dei Sistemi Digitali. Biblioteca delle Scienze, Collana Dispense on line .

N. H. E. Weste, K. Esraghian. Principles of CMOS VLSI Design. A Sistem Perspective. Addison-Wesley Publishing Company. This textbook includes most of the addressed subject.

Testing and exams

The exam consists of : 1) exercises (time available: 2,5 hours) related with the analysis and/or design of digital systems (weight of 0.6 on the final score). Books and notes are allowed during the test. 2) a brief (30 minutes) written theoretical section where 30 multiple choices tests, problems and theory questions are proposed (weight of 0.4 on the final score). No text (books, notes and so on) will be allowed during the test.