FACOLTA' DI INGEGNERIAUniversita' di Pavia
Home
  Teaching > Insegnamenti > Informatica industriale Translate this page in English
About the Faculty
Orientation
Teaching
Research
Services
Industry partnerships
Mobility Erasmus
Shortcuts
Search in this site
Informatica industriale

2009-10 Academic year

Lecturer: Francesco Leporati  

Course name: Informatica industriale
Course code: 064054
Degree course: Ingegneria Informatica
Disciplinary field of science: ING-INF/05
The course relates to:
University credits: CFU 5
Course website: gamma.unipv.it/infind

Specific course objectives

The course aims at the illustration of suitable computer science methodologies to manage industrial processes. At the end of the course, students should be able to interface computers and microprocessors with different control systems, acquiring data from transducers, driving common industrial actuators, managing digital communications with other processing systems and elaborating the acquired data perhaps subjected to digital filtering. The course aims, moreover, at introducing students in the embedded systems world, providing an overview of commonly used architectures and accelerators based on programmable logic devices.

Course programme

The course faces the following topics:

Data acquisition
Digital interfacing with microprocessors, edges and signal levels detection. Commercial components (latch, buffers, counters) management.
Electric and algorithmic filtering techniques.
Algorithms and their C-code implementation for acquisition of pulses in particular provided by incremental optical encoders.
Techniques for the output of pulses and to acquire signals from contraves and absolute encoders.
Examples of commercial transducers, multiplexers, analog to digital converters and their management. Sigma Delta converters.
Numeric implementation of ARMA filters: moving average and exponential filters.

Motor driving techniques
Hardware and software interface of direct current motors and low power servomotors.
PWM and H-bridge drivers.

Digital communication protocols
Serial and parallel communication (bit, character and message synchronisation, types of codification).
Examples of source codes for the management of the following protocols: IEEE 488, RS232, RS485. Assembly drivers of an USART device and of peripheral device of a typical microprocessors.
A typical implementation of a serial point to point communication.

Field Buses
Introduction to the field buses technology: FIP and CAN protocols

Embedded Systems
Introduction to the Embedded Systems.
ARM7: a typical family of microprocessors used in embedded systems. Assemlbly language and architecture.
FPGA devices: introduction, technologies and designing custom architectures with programmable logic devices. Quartus: the Altera's development environment.

Course entry requirements

The knowledge of topics faced in the courses of Industrial Electronics, Electronics and Computer Architecture is required to profitably attend lessons

Course structure and teaching

Lectures (hours/year in lecture theatre): 38
Practical class (hours/year in lecture theatre): 0
Practicals / Workshops (hours/year in lecture theatre): 0
Project work (hours/year in lecture theatre): 0

Suggested reading materials

Wayne Wolf. Computer as components. Morgan Kaufmann. Reference text for the course's part facing Embedded Systems..

Lorenzo Mezzalira. Lecture notes of Informatica Industriale. Lecture notes used for the same course at the Politechnic of Milan. Reference texts for the course's part facing digital and analog interfacing, digital communication protocols and field buses..

Francesco Leporati. Slides of the lessons (see the course's web site gamma.unipv.it/infind).

William Fornaciari, Carlo Brandolese. Sistemi Embedded. Pearson Prentice Hall.

Testing and exams

Two kinds of exams have been conceived:

Tests during the course:
The following rules are set:
1. the first trail deals with topics faced in the first part of the course that students are requested to explain and analyse in detail;
2. the second trial deals with topics that are faced in the time from the first trial and the end of the lessons; again students are requested to explain and analyse them in detail. The access to this trial is allowed if the first one has been passed.

Full exams:
In this case, the exam concerns the whole course program.

Copyright © Facoltà di Ingegneria - Università di Pavia