Lecturer: Guido Torelli  

Course name: Progettazione di circuiti digitali
Course code: 064082
Degree course: Ingegneria Elettronica
Disciplinary field of science: ING-INF/01
The course relates to:
University credits: CFU 5
Course website: n.d.

Specific course objectives

The main objective of the course is to provide the student with the basics of combinational and sequential logic design in CMOS technology and the operating principles of semiconductor memories. In addition to theoretical lectures, practical sessions with the computer will be held, during which the student will use a SPICE-based circuit simulator to analyze basic circuit blocks. At the end of the course, the student is expected to be able to design and analyze basic digital circuit blocks and architectural solutions in CMOS technology and evaluate their performance.

Course programme

Logic gates in CMOS technology
Outline on MOS transistor. Basics on CMOS inverter and logic gates. Transistor sizing in CMOS logic gates. Evaluation of rise time, fall time, and delay time of logic gates.

Circuit performance evaluation
Estimation of parasitic parameters. Distributed RC effects of interconnection lines. Ring oscillator. Speed performance analysis of logic gates. Tapered inverter chain for heavy capacitive load driving. Evaluation of power consumption and techniques for power consumption reduction. Design margins. Interconnection sizing. Pass transistor logic. Shrinking and scaling down.

Logic design in CMOS technology
Design strategy for combinational logic. CMOS dynamic logic: precharge logic; Domino logic; clocked CMOS logic. Clocked sequential systems. Outline on basic static memory elements (latch, flip-flop). Single-phase and two-phase clocking. Dynamic memory elements. Synchronous systems. Pipeline architecture. Clock distribution. Clock skew in synchronous systems. Remarks on low-power design in CMOS technology.

Semiconductor memories
Introduction to semiconductor memories. Types of memories. Memory organization. Row and column address circuits. Outline on volatile memories (static RAM, dynamic RAM). Non volatile memories: ROM; Flash memory; new-generation non volatile memories: phase change memories. Content addressable memories (CAMs). Voltage multipliers based on the charge pump principle.

Course entry requirements

Logic Networks; Computers; Basics of Electrotechnics; Electronics; Basics of Digital Electronics; Basics of CMOS Logic Gates; Basics of Integrated Circuit Technologies.

Course structure and teaching

Lectures (hours/year in lecture theatre): 26
Practical class (hours/year in lecture theatre): 18
Practicals / Workshops (hours/year in lecture theatre): 12
Project work (hours/year in lecture theatre): 0

Suggested reading materials

N. H. E. Weste, K. Eshraghian. Principles of CMOS VLSI Design. A Sistem Perspective. 2nd edition. Addison-Wesley Publishing Company, 1994.

J. M. Rabaey, A. Chandrakasan, B. Nikolic. Digital Integrated Circuits, A Design Perspective. 2nd Edition. Pearson Education, Inc. (Prentice Hall), Upper Saddle River, NJ, USA, 2003.

S.-M. Kang, Y. Leblebici. CMOS Digital Integrated Circuits: Analysis and Design. The McGraw-Hill Companies, Inc., 1996. For more details on circuit design.

Testing and exams

Written examination and oral examination. Relative weight: written examination 50%, oral examination 50%. Two intermediate examinations will be possible, the first during the term, the second at the end of the term; the student who will pass these intermediate examinations will not have to give the written examination and (at lest) a part of the oral examination, provided that the final examination (if any) will be given within the examination period immediately following the lesson term of the course.